wlan: Fix for "Macros with complex values'
This patch fixes the following problem reported by checkpatch:
Macros with complex values should be enclosed in parenthesis
Change-Id: Ie293631d347143808561c1745ddabbec58edc007
CR-Fixed: NA
diff --git a/CORE/DXE/src/wlan_qct_dxe_i.h b/CORE/DXE/src/wlan_qct_dxe_i.h
index d614ad2..9b4dd2b 100644
--- a/CORE/DXE/src/wlan_qct_dxe_i.h
+++ b/CORE/DXE/src/wlan_qct_dxe_i.h
@@ -98,51 +98,51 @@
#endif
#endif /* PAL_OS_TYPE_BMP */
-#define WLANDXE_REGISTER_BASE_ADDRESS WLANDXE_WCNSS_BASE_ADDRESS + 0x202000
+#define WLANDXE_REGISTER_BASE_ADDRESS (WLANDXE_WCNSS_BASE_ADDRESS + 0x202000)
/* Common over the channels register addresses */
-#define WALNDEX_DMA_CSR_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x00
-#define WALNDEX_DMA_ENCH_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x04
-#define WALNDEX_DMA_CH_EN_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x08
-#define WALNDEX_DMA_CH_DONE_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x0C
-#define WALNDEX_DMA_CH_ERR_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x10
-#define WALNDEX_DMA_CH_STOP_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x14
+#define WALNDEX_DMA_CSR_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x00)
+#define WALNDEX_DMA_ENCH_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x04)
+#define WALNDEX_DMA_CH_EN_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x08)
+#define WALNDEX_DMA_CH_DONE_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x0C)
+#define WALNDEX_DMA_CH_ERR_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x10)
+#define WALNDEX_DMA_CH_STOP_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x14)
/* Interrupt Control register address */
-#define WLANDXE_INT_MASK_REG_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x18
-#define WLANDXE_INT_SRC_MSKD_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x1C
-#define WLANDXE_INT_SRC_RAW_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x20
-#define WLANDXE_INT_ED_SRC_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x24
-#define WLANDXE_INT_DONE_SRC_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x28
-#define WLANDXE_INT_ERR_SRC_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x2C
-#define WLANDXE_INT_CLR_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x30
-#define WLANDXE_INT_ED_CLR_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x34
-#define WLANDXE_INT_DONE_CLR_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x38
-#define WLANDXE_INT_ERR_CLR_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x3C
+#define WLANDXE_INT_MASK_REG_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x18)
+#define WLANDXE_INT_SRC_MSKD_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x1C)
+#define WLANDXE_INT_SRC_RAW_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x20)
+#define WLANDXE_INT_ED_SRC_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x24)
+#define WLANDXE_INT_DONE_SRC_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x28)
+#define WLANDXE_INT_ERR_SRC_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x2C)
+#define WLANDXE_INT_CLR_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x30)
+#define WLANDXE_INT_ED_CLR_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x34)
+#define WLANDXE_INT_DONE_CLR_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x38)
+#define WLANDXE_INT_ERR_CLR_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x3C)
-#define WLANDXE_DMA_CH_PRES_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x40
-#define WLANDXE_ARB_CH_MSK_CLR_ADDRRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x74
+#define WLANDXE_DMA_CH_PRES_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x40)
+#define WLANDXE_ARB_CH_MSK_CLR_ADDRRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x74)
/* Channel Counter register */
-#define WLANDXE_DMA_COUNTER_0 WLANDXE_REGISTER_BASE_ADDRESS + 0x200
-#define WLANDXE_DMA_COUNTER_1 WLANDXE_REGISTER_BASE_ADDRESS + 0x204
-#define WLANDXE_DMA_COUNTER_2 WLANDXE_REGISTER_BASE_ADDRESS + 0x208
-#define WLANDXE_DMA_COUNTER_3 WLANDXE_REGISTER_BASE_ADDRESS + 0x20C
-#define WLANDXE_DMA_COUNTER_4 WLANDXE_REGISTER_BASE_ADDRESS + 0x210
-#define WLANDXE_DMA_COUNTER_5 WLANDXE_REGISTER_BASE_ADDRESS + 0x214
-#define WLANDXE_DMA_COUNTER_6 WLANDXE_REGISTER_BASE_ADDRESS + 0x218
+#define WLANDXE_DMA_COUNTER_0 (WLANDXE_REGISTER_BASE_ADDRESS + 0x200)
+#define WLANDXE_DMA_COUNTER_1 (WLANDXE_REGISTER_BASE_ADDRESS + 0x204)
+#define WLANDXE_DMA_COUNTER_2 (WLANDXE_REGISTER_BASE_ADDRESS + 0x208)
+#define WLANDXE_DMA_COUNTER_3 (WLANDXE_REGISTER_BASE_ADDRESS + 0x20C)
+#define WLANDXE_DMA_COUNTER_4 (WLANDXE_REGISTER_BASE_ADDRESS + 0x210)
+#define WLANDXE_DMA_COUNTER_5 (WLANDXE_REGISTER_BASE_ADDRESS + 0x214)
+#define WLANDXE_DMA_COUNTER_6 (WLANDXE_REGISTER_BASE_ADDRESS + 0x218)
-#define WLANDXE_ENGINE_STAT_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x64
-#define WLANDXE_BMU_SB_QDAT_AV_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x5c
+#define WLANDXE_ENGINE_STAT_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x64)
+#define WLANDXE_BMU_SB_QDAT_AV_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x5c)
/* Channel Base address */
-#define WLANDXE_DMA_CHAN0_BASE_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x400
-#define WLANDXE_DMA_CHAN1_BASE_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x440
-#define WLANDXE_DMA_CHAN2_BASE_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x480
-#define WLANDXE_DMA_CHAN3_BASE_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x4C0
-#define WLANDXE_DMA_CHAN4_BASE_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x500
-#define WLANDXE_DMA_CHAN5_BASE_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x540
-#define WLANDXE_DMA_CHAN6_BASE_ADDRESS WLANDXE_REGISTER_BASE_ADDRESS + 0x580
+#define WLANDXE_DMA_CHAN0_BASE_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x400)
+#define WLANDXE_DMA_CHAN1_BASE_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x440)
+#define WLANDXE_DMA_CHAN2_BASE_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x480)
+#define WLANDXE_DMA_CHAN3_BASE_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x4C0)
+#define WLANDXE_DMA_CHAN4_BASE_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x500)
+#define WLANDXE_DMA_CHAN5_BASE_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x540)
+#define WLANDXE_DMA_CHAN6_BASE_ADDRESS (WLANDXE_REGISTER_BASE_ADDRESS + 0x580)
/* Channel specific register offset */
#define WLANDXE_DMA_CH_CTRL_REG 0x0000