commit e66181653cdb9f0d6bef6d414de4fa4a3d24bab0
author Mihir Shete <smihir@qti.qualcomm.com> Mon Mar 16 14:48:42 2015 +0530
committer Satyanarayana Dash <c_sadash@qti.qualcomm.com> Thu Apr 02 18:47:17 2015 +0530
tree 1abd5038086c57b585294e2deea6b3036e12f87e
parent e2ae82a72453c1ec84c0a59c5b963c15f3fde122

wlan: add support for new channel in DXE driver

add support for configuring channel 5 to receive
data. This channel will be used by the firmware
to send the logging data.

CRs-Fixed: 813591
Change-Id: I7f6c729daae7aa33042dae2d9e0be5639d31b982

CORE/DXE/src/wlan_qct_dxe_cfg_i.c

diff --git a/CORE/DXE/src/wlan_qct_dxe_cfg_i.c b/CORE/DXE/src/wlan_qct_dxe_cfg_i.c
index 9f94e6c..c44d060 100644
--- a/CORE/DXE/src/wlan_qct_dxe_cfg_i.c
+++ b/CORE/DXE/src/wlan_qct_dxe_cfg_i.c
@@ -252,12 +252,52 @@
    eWLAN_PAL_TRUE
 };
 
+WLANDXE_ChannelConfigType chanRXLogConfig =
+{
+   /* Q handle type, Circular */
+   WLANDXE_CHANNEL_HANDLE_CIRCULA,
+
+   /* Number of Descriptors*/
+   8,
+
+   /* MAX num RX Buffer*/
+   1,
+
+   /* Reference WQ, RX23 */
+   23,
+
+   /* USB Only, End point info */
+   0,
+
+   /* Transfer Type */
+   WLANDXE_DESC_CTRL_XTYPE_B2H,
+
+   /* Channel Priority 7(Highest) - 0(Lowest)*/
+   0,
+
+   /* BD attached to frames for this pipe */
+   eWLAN_PAL_TRUE,
+
+   /* chk_size*/
+   0,
+
+   /* bmuThdSel*/
+   8,
+
+   /* Added in Gen5 for Prefetch*/
+   eWLAN_PAL_TRUE,
+
+   /* Use short Descriptor */
+   eWLAN_PAL_TRUE
+};
+
 WLANDXE_ChannelMappingType channelList[WDTS_CHANNEL_MAX] =
 {
    {WDTS_CHANNEL_TX_LOW_PRI,  WLANDXE_DMA_CHANNEL_0, &chanTXLowPriConfig},
    {WDTS_CHANNEL_TX_HIGH_PRI, WLANDXE_DMA_CHANNEL_4, &chanTXHighPriConfig},
    {WDTS_CHANNEL_RX_LOW_PRI,  WLANDXE_DMA_CHANNEL_1, &chanRXLowPriConfig},
    {WDTS_CHANNEL_RX_HIGH_PRI, WLANDXE_DMA_CHANNEL_3, &chanRXHighPriConfig},
+   {WDTS_CHANNEL_RX_LOG, WLANDXE_DMA_CHANNEL_5, &chanRXLogConfig},
 };
 
 WLANDXE_TxCompIntConfigType txCompInt = 
@@ -281,6 +321,49 @@
    10
 };
 
+// Indicates the DXE channels being used in the current run.
+static wpt_uint8 dxeEnabledChannels;
+
+/*==========================================================================
+  @  Function Name
+      dxeSetEnabledChannels
+
+  @  Description
+
+  @  Parameters
+
+  @  Return
+      void
+
+===========================================================================*/
+void dxeSetEnabledChannels
+(
+   wpt_uint8 enabledChannels
+)
+{
+   dxeEnabledChannels = enabledChannels;
+}
+
+/*==========================================================================
+  @  Function Name
+      dxeGetEnabledChannels
+
+  @  Description
+
+  @  Parameters
+
+  @  Return
+      wpt_uint8
+
+===========================================================================*/
+wpt_uint8 dxeGetEnabledChannels
+(
+   void
+)
+{
+   return dxeEnabledChannels;
+}
+
 /*==========================================================================
   @  Function Name 
       dxeCommonDefaultConfig
@@ -428,7 +511,8 @@
    }
    /* RX Channel, Set SIQ bit, Clear DIQ bit since source is not WQ */
    else if((WDTS_CHANNEL_RX_LOW_PRI  == channelEntry->channelType) ||
-           (WDTS_CHANNEL_RX_HIGH_PRI == channelEntry->channelType))
+           (WDTS_CHANNEL_RX_HIGH_PRI == channelEntry->channelType) ||
+           (WDTS_CHANNEL_RX_LOG == channelEntry->channelType))
    {
       channelEntry->extraConfig.chan_mask |= WLANDXE_CH_CTRL_SIQ_MASK;
    }
@@ -570,6 +654,10 @@
    {
       channelEntry->numDesc         = mappedChannel->channelConfig->nDescs;
    }
+   else if(WDTS_CHANNEL_RX_LOG == channelEntry->channelType)
+   {
+      channelEntry->numDesc         = mappedChannel->channelConfig->nDescs;
+   }
    else
    {
       channelEntry->numDesc         = rxResourceCount / 4;