qcacmn: Replace A_TARGET_ACCESS_BEGIN/END_RET apis
Macros should not alter the execution of function bodies.
Change-Id: I54c90230c5c0f43cb20412110f4eb7aa568e654d
CRs-Fixed: 986480
diff --git a/hif/src/ce/ce_service.c b/hif/src/ce/ce_service.c
index b3978b5..4fc62a9 100644
--- a/hif/src/ce/ce_service.c
+++ b/hif/src/ce/ce_service.c
@@ -291,12 +291,14 @@
uint64_t dma_addr = buffer;
struct hif_softc *scn = CE_state->scn;
- A_TARGET_ACCESS_BEGIN_RET(scn);
+ if (Q_TARGET_ACCESS_BEGIN(scn) < 0)
+ return ATH_ISR_NOSCHED;
if (unlikely(CE_RING_DELTA(nentries_mask,
write_index, sw_index - 1) <= 0)) {
OL_ATH_CE_PKT_ERROR_COUNT_INCR(scn, CE_RING_DELTA_FAIL);
status = QDF_STATUS_E_FAILURE;
- A_TARGET_ACCESS_END_RET(scn);
+ if (Q_TARGET_ACCESS_END(scn) < 0)
+ return ATH_ISR_SCHED;
return status;
}
{
@@ -359,7 +361,8 @@
src_ring->write_index = write_index;
status = QDF_STATUS_SUCCESS;
}
- A_TARGET_ACCESS_END_RET(scn);
+ if (Q_TARGET_ACCESS_END(scn) < 0)
+ return ATH_ISR_SCHED;
return status;
}
@@ -1032,10 +1035,12 @@
* the SW has really caught up to the HW, or if the cached
* value of the HW index has become stale.
*/
- A_TARGET_ACCESS_BEGIN_RET(scn);
+ if (Q_TARGET_ACCESS_BEGIN(scn) < 0)
+ return ATH_ISR_NOSCHED;
src_ring->hw_index =
CE_SRC_RING_READ_IDX_GET_FROM_DDR(scn, ctrl_addr);
- A_TARGET_ACCESS_END_RET(scn);
+ if (Q_TARGET_ACCESS_END(scn) < 0)
+ return ATH_ISR_SCHED;
}
read_index = src_ring->hw_index;