qcacmn: Enable msi support for ext_group ring groupings
assign msi vectors to srng rings based on the ext_group they will be
serviced in.
provide support for ext_groups in hif_pci.
Change-Id: If313fdb43b939871c0d73dea9a05f757427b5b16
CRs-Fixed: 2051911
diff --git a/hif/src/ce/ce_service_srng.c b/hif/src/ce/ce_service_srng.c
index b025c40..e39434c 100644
--- a/hif/src/ce/ce_service_srng.c
+++ b/hif/src/ce/ce_service_srng.c
@@ -585,9 +585,6 @@
if (ret)
return;
- HIF_INFO("%s: ce_id %d, msi_start: %d, msi_count %d", __func__, ce_id,
- msi_data_start, msi_data_count);
-
pld_get_msi_address(scn->qdf_dev->dev, &addr_low, &addr_high);
ring_params->msi_addr = addr_low;
@@ -595,19 +592,18 @@
ring_params->msi_data = (ce_id % msi_data_count) + msi_data_start;
ring_params->flags |= HAL_SRNG_MSI_INTR;
- HIF_INFO("%s: ce_id %d, msi_addr %p, msi_data %d", __func__, ce_id,
+ HIF_DBG("%s: ce_id %d, msi_addr %p, msi_data %d", __func__, ce_id,
(void *)ring_params->msi_addr, ring_params->msi_data);
}
static void ce_srng_src_ring_setup(struct hif_softc *scn, uint32_t ce_id,
- struct CE_ring_state *src_ring)
+ struct CE_ring_state *src_ring,
+ struct CE_attr *attr)
{
struct hal_srng_params ring_params = {0};
HIF_INFO("%s: ce_id %d", __func__, ce_id);
- ce_srng_msi_ring_params_setup(scn, ce_id, &ring_params);
-
ring_params.ring_base_paddr = src_ring->base_addr_CE_space;
ring_params.ring_base_vaddr = src_ring->base_addr_owner_space;
ring_params.num_entries = src_ring->nentries;
@@ -617,14 +613,13 @@
* A valid default value caused continuous interrupts to
* fire with MSI enabled. Need to revisit usage of the timer
*/
- ring_params.intr_timer_thres_us = 0;
- ring_params.intr_batch_cntr_thres_entries = 1;
- /* TODO
- * ring_params.msi_addr = XXX;
- * ring_params.msi_data = XXX;
- * ring_params.flags = XXX;
- */
+ if (!(CE_ATTR_DISABLE_INTR & attr->flags)) {
+ ce_srng_msi_ring_params_setup(scn, ce_id, &ring_params);
+
+ ring_params.intr_timer_thres_us = 0;
+ ring_params.intr_batch_cntr_thres_entries = 1;
+ }
src_ring->srng_ctx = hal_srng_setup(scn->hal_soc, CE_SRC, ce_id, 0,
&ring_params);
@@ -635,25 +630,31 @@
struct CE_attr *attr)
{
struct hal_srng_params ring_params = {0};
+ bool status_ring_timer_thresh_work_arround = true;
HIF_INFO("%s: ce_id %d", __func__, ce_id);
- ce_srng_msi_ring_params_setup(scn, ce_id, &ring_params);
-
ring_params.ring_base_paddr = dest_ring->base_addr_CE_space;
ring_params.ring_base_vaddr = dest_ring->base_addr_owner_space;
ring_params.num_entries = dest_ring->nentries;
- ring_params.low_threshold = dest_ring->nentries - 1;
- ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
- ring_params.intr_timer_thres_us = 1024;
- ring_params.intr_batch_cntr_thres_entries = 0;
ring_params.max_buffer_length = attr->src_sz_max;
- /* TODO
- * ring_params.msi_addr = XXX;
- * ring_params.msi_data = XXX;
- * ring_params.flags = XXX;
- */
+ if (!(CE_ATTR_DISABLE_INTR & attr->flags)) {
+ ce_srng_msi_ring_params_setup(scn, ce_id, &ring_params);
+ if (status_ring_timer_thresh_work_arround) {
+ /* hw bug work arround*/
+ ring_params.low_threshold = dest_ring->nentries - 1;
+ ring_params.intr_timer_thres_us = 1024;
+ ring_params.intr_batch_cntr_thres_entries = 0;
+ ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
+ } else {
+ /* normal behavior for future chips */
+ ring_params.low_threshold = dest_ring->nentries >> 3;
+ ring_params.intr_timer_thres_us = 100000;
+ ring_params.intr_batch_cntr_thres_entries = 0;
+ ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
+ }
+ }
/*Dest ring is also source ring*/
dest_ring->srng_ctx = hal_srng_setup(scn->hal_soc, CE_DST, ce_id, 0,
@@ -661,7 +662,8 @@
}
static void ce_srng_status_ring_setup(struct hif_softc *scn, uint32_t ce_id,
- struct CE_ring_state *status_ring)
+ struct CE_ring_state *status_ring,
+ struct CE_attr *attr)
{
struct hal_srng_params ring_params = {0};
@@ -672,14 +674,11 @@
ring_params.ring_base_paddr = status_ring->base_addr_CE_space;
ring_params.ring_base_vaddr = status_ring->base_addr_owner_space;
ring_params.num_entries = status_ring->nentries;
- ring_params.intr_timer_thres_us = 0;
- ring_params.intr_batch_cntr_thres_entries = 1;
- /* TODO
- * ring_params.msi_addr = XXX;
- * ring_params.msi_data = XXX;
- * ring_params.flags = XXX;
- */
+ if (!(CE_ATTR_DISABLE_INTR & attr->flags)) {
+ ring_params.intr_timer_thres_us = 0x1000;
+ ring_params.intr_batch_cntr_thres_entries = 0x1;
+ }
status_ring->srng_ctx = hal_srng_setup(scn->hal_soc, CE_DST_STATUS,
ce_id, 0, &ring_params);
@@ -691,13 +690,13 @@
{
switch (ring_type) {
case CE_RING_SRC:
- ce_srng_src_ring_setup(scn, ce_id, ring);
+ ce_srng_src_ring_setup(scn, ce_id, ring, attr);
break;
case CE_RING_DEST:
ce_srng_dest_ring_setup(scn, ce_id, ring, attr);
break;
case CE_RING_STATUS:
- ce_srng_status_ring_setup(scn, ce_id, ring);
+ ce_srng_status_ring_setup(scn, ce_id, ring, attr);
break;
default:
qdf_assert(0);