qcacmn: Set default value for REO dest ctrl register
NOC error is observed when PCIe accesses IPA GSI RX doorbell
register even before IPA clocks are ON. Currently for SAP vdev,
default REO dest is set to REO2SW4 and with RX hash being
disabled, packets will finally land on REO2SW4 ring. If packets
arrive on REO and are routed to SW4 ring, REO HW will ring
IPA GSI doorbell address and thus the NOC error will occur
because IPA clocks are still OFF which should be set to ON
by WLAN via ipa_wdi_enable_pipes API.
Fix is to set DEST_RING_MAPPING_4 to SW2 for REO dest ctrl
register such that packets arrived before IPA pipes are
enabled will be handled by WLAN host. Note that
DEST_RING_MAPPING_4 will be remapped to SW4 after IPA pipes
are enabled.
Also correctly configure REO dest ctrl register when RX hash
feature is disabled when enabling and disabling IPA
autonomy.
Change-Id: Ifd471bbe2e4a0e66e080d9ae51fb2a3600fd87e6
CRs-Fixed: 2554023
diff --git a/dp/wifi3.0/dp_ipa.c b/dp/wifi3.0/dp_ipa.c
index af27dc5..9f9cc90 100644
--- a/dp/wifi3.0/dp_ipa.c
+++ b/dp/wifi3.0/dp_ipa.c
@@ -403,6 +403,7 @@
struct hal_srng_params srng_params;
qdf_dma_addr_t hp_addr;
unsigned long addr_offset, dev_base_paddr;
+ uint32_t ix0;
if (!wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx))
return QDF_STATUS_SUCCESS;
@@ -518,6 +519,21 @@
srng_params.num_entries,
soc->ipa_uc_rx_rsc.ipa_rx_refill_buf_ring_size);
+ /*
+ * Set DEST_RING_MAPPING_4 to SW2 as default value for
+ * DESTINATION_RING_CTRL_IX_0.
+ */
+ ix0 = HAL_REO_REMAP_IX0(REO_REMAP_TCL, 0) |
+ HAL_REO_REMAP_IX0(REO_REMAP_SW1, 1) |
+ HAL_REO_REMAP_IX0(REO_REMAP_SW2, 2) |
+ HAL_REO_REMAP_IX0(REO_REMAP_SW3, 3) |
+ HAL_REO_REMAP_IX0(REO_REMAP_SW2, 4) |
+ HAL_REO_REMAP_IX0(REO_REMAP_RELEASE, 5) |
+ HAL_REO_REMAP_IX0(REO_REMAP_FW, 6) |
+ HAL_REO_REMAP_IX0(REO_REMAP_FW, 7);
+
+ hal_reo_read_write_ctrl_ix(soc->hal_soc, false, &ix0, NULL, NULL, NULL);
+
return 0;
}
@@ -776,10 +792,13 @@
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 21) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 22) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 23);
- }
- hal_reo_read_write_ctrl_ix(soc->hal_soc, false, &ix0, NULL,
- &ix2, &ix2);
+ hal_reo_read_write_ctrl_ix(soc->hal_soc, false, &ix0, NULL,
+ &ix2, &ix2);
+ } else {
+ hal_reo_read_write_ctrl_ix(soc->hal_soc, false, &ix0, NULL,
+ NULL, NULL);
+ }
return QDF_STATUS_SUCCESS;
}
@@ -818,6 +837,9 @@
hal_reo_read_write_ctrl_ix(soc->hal_soc, false, &ix0, NULL,
&ix2, &ix3);
+ } else {
+ hal_reo_read_write_ctrl_ix(soc->hal_soc, false, &ix0, NULL,
+ NULL, NULL);
}
return QDF_STATUS_SUCCESS;