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Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001/*
2 * Copyright (c) 2015 The Linux Foundation. All rights reserved.
3 *
4 * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
5 *
6 *
7 * Permission to use, copy, modify, and/or distribute this software for
8 * any purpose with or without fee is hereby granted, provided that the
9 * above copyright notice and this permission notice appear in all
10 * copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
13 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
14 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
15 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
16 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
17 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
18 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
19 * PERFORMANCE OF THIS SOFTWARE.
20 */
21
22/*
23 * This file was originally distributed by Qualcomm Atheros, Inc.
24 * under proprietary terms before Copyright ownership was assigned
25 * to the Linux Foundation.
26 */
27
28#if !defined(__SME_POWER_SAVE_H)
29#define __SME_POWER_SAVE_H
30#include "cdf_lock.h"
31#include "cdf_trace.h"
32#include "cdf_memory.h"
33#include "cdf_types.h"
34#include "ani_system_defs.h"
35#include "sir_api.h"
36
37#define MAX_SME_SESSIONS 5
38/* Auto Ps Entry Timer Default value - 1000 ms */
39#define AUTO_PS_ENTRY_TIMER_DEFAULT_VALUE 1000
40
41/* Auto Deferred Ps Entry Timer value - 20000 ms */
42#define AUTO_DEFERRED_PS_ENTRY_TIMER_DEFAULT_VALUE 20000
43
44
45
46/**
47 * enum ps_state - State of the power save
48 * @FULL_POWER_MODE: for Full power mode
49 * @LEGACY_POWER_SAVE_MODE: For Legacy Power Save mode
50 * @UAPSD_MODE: for UAPSD power save
51 */
52
53enum ps_state {
54 FULL_POWER_MODE,
55 LEGACY_POWER_SAVE_MODE,
56 UAPSD_MODE
57};
58
59/**
60 * struct ps_params - maintain power save state and USAPD params
61 * @mac_ctx: mac_ctx
62 * @session_id: Session Id.
63 * @ps_state : State of the power save
64 * @uapsd_per_ac_trigger_enable_mask: dynamic UPASD mask setting
65 * derived from AddTS Rsp and DelTS frame.
66 * If a particular AC bit is set, it means AC is trigger enabled.
67 * @uapsd_per_ac_delivery_enable_mask: dynamic UPASD mask setting
68 * derived from AddTS Rsp and DelTs frame.
69 * If a particular AC bit is set, it means AC is delivery enabled.
70 * @ac_admit_mask: used for AC downgrade. This is a dynamic mask
71 * setting which keep tracks of ACs being admitted.
72 * If bit is set to 0: That particular AC is not admitted
73 * If bit is set to 1: That particular AC is admitted
74 * @ uapsd_per_ac_bit_mask: This is a static UAPSD mask setting
75 * derived from SME_JOIN_REQ and SME_REASSOC_REQ.
76 * If a particular AC bit is set, it means the AC is both
77 * trigger enabled and delivery enabled.
78 * @enter_wowl_callback_routine: routine to call for wowl request.
79 * @enter_wowl_callback_context: value to be passed as parameter to
80 * routine specified above.
81 * @wowl_enter_params: WOWL mode configuration.
82 * @wake_reason_ind_cb: routine to call for wake reason indication.
83 * @wake_reason_ind_cb_ctx: value to be passed as parameter to
84 * routine specified above.
85 */
86
87struct ps_params {
88 void *mac_ctx;
89 uint32_t session_id;
90 enum ps_state ps_state;
91 uint8_t uapsd_per_ac_trigger_enable_mask;
92 uint8_t uapsd_per_ac_delivery_enable_mask;
93 uint8_t ac_admit_mask[SIR_MAC_DIRECTION_DIRECT];
94 uint8_t uapsd_per_ac_bit_mask;
95 /* WOWL param */
96 void (*enter_wowl_callback_routine)(void *callback_context,
97 CDF_STATUS status);
98 void *enter_wowl_callback_context;
99 tSirSmeWowlEnterParams wowl_enter_params;
100#ifdef WLAN_WAKEUP_EVENTS
101 void (*wake_reason_ind_cb)(void *callback_context,
102 tpSirWakeReasonInd wake_reason_ind);
103 void *wake_reason_ind_cb_ctx;
104#endif /* WLAN_WAKEUP_EVENTS */
105#ifdef FEATURE_WLAN_TDLS
106 bool is_tdls_power_save_prohibited;
107#endif
108 /*
109 * Auto Sta Ps Enable Timer
110 * Upon expiration of this timer
111 * Power Save Offload module will
112 * try to enable sta mode ps
113 */
114 cdf_mc_timer_t auto_ps_enable_timer;
115
116};
117
118/**
119 * struct ps_global_info - global struct for Power save information
120 * @ps_enabled: Power Save is enabled or not in ini
121 * @ps_params: maintain power save state and USAPD params
122 */
123struct ps_global_info {
124 bool ps_enabled;
125 struct ps_params ps_params[MAX_SME_SESSIONS];
126 /* Remain in Power active till DHCP completes */
127 bool remain_in_power_active_till_dhcp;
128};
129
130/**
131 * enum sme_ps_cmd: power save message to send WMA
132 * @SME_PS_ENABLE: For power save enable.
133 * @SME_PS_DISABLE: for Power save disable.
134 * @SME_PS_UAPSD_ENABLE; for UAPSD enable.
135 * @SME_PS_UAPSD_DISABLE: for UAPSD disable.
136 * @SME_PS_WOWL_ENTER: for WOWL Enter.
137 * @SME_PS_WOWL_EXIT: for WOWL Exit.
138 * @SME_PS_WOWL_ADD_BCAST_PTRN: Add bcst WOWL pattern.
139 * @SME_PS_WOWL_DEL_BCAST_PTRN: Del Bcsr Wowl Pattern.
140 */
141enum sme_ps_cmd {
142 SME_PS_ENABLE = 0,
143 SME_PS_DISABLE,
144 SME_PS_UAPSD_ENABLE,
145 SME_PS_UAPSD_DISABLE,
146 SME_PS_WOWL_ENTER,
147 SME_PS_WOWL_EXIT,
148 SME_PS_WOWL_ADD_BCAST_PTRN,
149 SME_PS_WOWL_DEL_BCAST_PTRN,
150};
151
152#endif