Enabling thumb2 mode used to force support for armv6t2. Replace this
with a temporary assertion and adjust the various test cases.
llvm-svn: 197224
diff --git a/llvm/test/CodeGen/Thumb2/thumb2-ldr_ext.ll b/llvm/test/CodeGen/Thumb2/thumb2-ldr_ext.ll
index 9e6aef4..b865cf4 100644
--- a/llvm/test/CodeGen/Thumb2/thumb2-ldr_ext.ll
+++ b/llvm/test/CodeGen/Thumb2/thumb2-ldr_ext.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep ldrb | count 1
-; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep ldrh | count 1
-; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep ldrsb | count 1
-; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep ldrsh | count 1
+; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | grep ldrb | count 1
+; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | grep ldrh | count 1
+; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | grep ldrsb | count 1
+; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | grep ldrsh | count 1
define i32 @test1(i8* %v.pntr.s0.u1) {
%tmp.u = load i8* %v.pntr.s0.u1