[RISCV] Peephole optimisation for load/store of global values or constant addresses
(load (add base, off), 0) -> (load base, off)
(store val, (add base, off)) -> (store val, base, off)
This is similar to an equivalent peephole optimisation in PPCISelDAGToDAG.
llvm-svn: 327831
diff --git a/llvm/test/CodeGen/RISCV/inline-asm.ll b/llvm/test/CodeGen/RISCV/inline-asm.ll
index 5c46b82..a16375b 100644
--- a/llvm/test/CodeGen/RISCV/inline-asm.ll
+++ b/llvm/test/CodeGen/RISCV/inline-asm.ll
@@ -8,8 +8,7 @@
; RV32I-LABEL: constraint_r:
; RV32I: # %bb.0:
; RV32I-NEXT: lui a1, %hi(gi)
-; RV32I-NEXT: addi a1, a1, %lo(gi)
-; RV32I-NEXT: lw a1, 0(a1)
+; RV32I-NEXT: lw a1, %lo(gi)(a1)
; RV32I-NEXT: #APP
; RV32I-NEXT: add a0, a0, a1
; RV32I-NEXT: #NO_APP