Move the PPCSelectionDAGInfo off the TargetMachine and onto the
subtarget.
llvm-svn: 210854
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
index cee54bd..0759200 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -81,7 +81,7 @@
OptLevel(OptLevel),
FrameLowering(initializeSubtargetDependencies(CPU, FS)),
DL(getDataLayoutString(*this)), InstrInfo(*this), JITInfo(*this),
- TLInfo(TM) {}
+ TLInfo(TM), TSInfo(&DL) {}
/// SetJITMode - This is called to inform the subtarget info that we are
/// producing code for the JIT.
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.h b/llvm/lib/Target/PowerPC/PPCSubtarget.h
index 91d1746..3436095 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.h
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.h
@@ -18,6 +18,7 @@
#include "PPCInstrInfo.h"
#include "PPCISelLowering.h"
#include "PPCJITInfo.h"
+#include "PPCSelectionDAGInfo.h"
#include "llvm/ADT/Triple.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/MC/MCInstrItineraries.h"
@@ -112,6 +113,7 @@
PPCInstrInfo InstrInfo;
PPCJITInfo JITInfo;
PPCTargetLowering TLInfo;
+ PPCSelectionDAGInfo TSInfo;
public:
/// This constructor initializes the data members to match that
@@ -147,6 +149,7 @@
const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; }
PPCJITInfo *getJITInfo() { return &JITInfo; }
const PPCTargetLowering *getTargetLowering() const { return &TLInfo; }
+ const PPCSelectionDAGInfo *getSelectionDAGInfo() const { return &TSInfo; }
/// initializeSubtargetDependencies - Initializes using a CPU and feature string
/// so that we can use initializer lists for subtarget initialization.
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index dc23e95..9563b90 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -42,8 +42,7 @@
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL, bool is64Bit)
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
- Subtarget(TT, CPU, FS, *this, is64Bit, OL),
- TSInfo(Subtarget.getDataLayout()) {
+ Subtarget(TT, CPU, FS, *this, is64Bit, OL) {
initAsmInfo();
}
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.h b/llvm/lib/Target/PowerPC/PPCTargetMachine.h
index 705874c..3cf8063 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.h
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.h
@@ -29,7 +29,6 @@
///
class PPCTargetMachine : public LLVMTargetMachine {
PPCSubtarget Subtarget;
- PPCSelectionDAGInfo TSInfo;
public:
PPCTargetMachine(const Target &T, StringRef TT,
@@ -48,7 +47,7 @@
return getSubtargetImpl()->getTargetLowering();
}
const PPCSelectionDAGInfo* getSelectionDAGInfo() const override {
- return &TSInfo;
+ return getSubtargetImpl()->getSelectionDAGInfo();
}
const PPCRegisterInfo *getRegisterInfo() const override {
return &getInstrInfo()->getRegisterInfo();