commit 02b700306866746df10db110d36e1917eef454da
author Zoran Jovanovic <zoran.jovanovic@imgtec.com> Thu Apr 21 13:43:26 2016 +0000
committer Zoran Jovanovic <zoran.jovanovic@imgtec.com> Thu Apr 21 13:43:26 2016 +0000
tree 1f8f58b58d526d1f796f6a95e545bc75a5c49083
parent 201398e8a308fdeda8d9f9ddb7797bbb3d919381

[mips][microMIPS] Add R_MICROMIPS_PC26_S1 relocation

Differential Revision: http://reviews.llvm.org/D14822

llvm-svn: 266985

llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp

diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
index 2ab4b99..b0a4157 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
@@ -356,7 +356,13 @@
   if (MO.isImm())
     return MO.getImm() >> 1;
 
-  // TODO: Push 26 PC fixup.
+  assert(MO.isExpr() &&
+         "getBranchTarget26OpValueMM expects only expressions or immediates");
+
+  const MCExpr *FixupExpression = MCBinaryExpr::createAdd(
+      MO.getExpr(), MCConstantExpr::create(-4, Ctx), Ctx);
+  Fixups.push_back(MCFixup::create(0, FixupExpression,
+                                   MCFixupKind(Mips::fixup_MICROMIPS_PC26_S1)));
   return 0;
 }