[CodeGen] Emit more precise AssertZext/AssertSext nodes.
This is marginally helpful for removing redundant extensions, and the
code is easier to read, so it seems like an all-around win. In the new
test i8-phi-ext.ll, we used to emit an AssertSext i8; now we emit an
AssertZext i2, which allows the extension of the return value to be
eliminated.
Differential Revision: https://reviews.llvm.org/D49004
llvm-svn: 336868
diff --git a/llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll b/llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
index 8fdcfe5..44a6918 100644
--- a/llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
+++ b/llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
@@ -140,7 +140,7 @@
; GCN: s_and_saveexec_b64
; CI: v_add_i32_e32 v0, vcc, 4, [[ADD]]
-; CI: buffer_load_dword v1, v0, s[0:3], s4 offen{{$}}
+; CI: buffer_load_dword v1, v1, s[0:3], s4 offen offset:4{{$}}
; GFX9: v_add_u32_e32 v0, 4, [[ADD]]
; GFX9: buffer_load_dword v1, v{{[0-9]+}}, s[0:3], s4 offen offset:4{{$}}
diff --git a/llvm/test/CodeGen/Thumb/i8-phi-ext.ll b/llvm/test/CodeGen/Thumb/i8-phi-ext.ll
new file mode 100644
index 0000000..598f4f3
--- /dev/null
+++ b/llvm/test/CodeGen/Thumb/i8-phi-ext.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s | FileCheck %s
+
+target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
+target triple = "thumbv6m---eabi"
+
+; CHECK-LABEL: test_fn
+; CHECK-NOT: uxtb
+define dso_local zeroext i8 @test_fn(i32 %x, void (...)* nocapture %f) {
+entry:
+ %tobool = icmp eq i32 %x, 0
+ br i1 %tobool, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ %callee.knr.cast = bitcast void (...)* %f to void ()*
+ tail call void %callee.knr.cast() #1
+ br label %if.end
+
+if.end: ; preds = %entry, %if.then
+ %z.0 = phi i8 [ 3, %if.then ], [ 0, %entry ]
+ ret i8 %z.0
+}
diff --git a/llvm/test/CodeGen/X86/pr32282.ll b/llvm/test/CodeGen/X86/pr32282.ll
index e5547fc..ed1ec07 100644
--- a/llvm/test/CodeGen/X86/pr32282.ll
+++ b/llvm/test/CodeGen/X86/pr32282.ll
@@ -56,7 +56,7 @@
; X64-NEXT: # %bb.2:
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: xorl %edx, %edx
-; X64-NEXT: idivq %rcx
+; X64-NEXT: divq %rcx
; X64-NEXT: jmp .LBB0_3
; X64-NEXT: .LBB0_1:
; X64-NEXT: xorl %eax, %eax