commit 03d8584590c647add646df7557b2e448633ce77c
author Matt Arsenault <Matthew.Arsenault@amd.com> Mon Jun 27 20:32:13 2016 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Mon Jun 27 20:32:13 2016 +0000
tree f3b960436a3e4bc947e267a97ca8644a6d098a4a
parent 5cdf699daafe87163242a1cc9b4109fd3cb576ff

AMDGPU: Move subtarget feature checks into passes

llvm-svn: 273937

llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp

diff --git a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
index 0b9b29a..9e972a5 100644
--- a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
@@ -412,6 +412,9 @@
     return false;
 
   const SISubtarget &STM = MF.getSubtarget<SISubtarget>();
+  if (!STM.loadStoreOptEnabled())
+    return false;
+
   TII = STM.getInstrInfo();
   TRI = &TII->getRegisterInfo();