commit 0464c5d958065c571a605f5da3cfd4b729950be7
author Amjad Aboud <amjad.aboud@intel.com> Tue Aug 15 19:33:14 2017 +0000
committer Amjad Aboud <amjad.aboud@intel.com> Tue Aug 15 19:33:14 2017 +0000
tree 2fb6cb0a5efa6ca1d9820012d6c9519e421f853b
parent ab0400d5afae783d080883f4fc91f574f97ce917

[InstCombine] Added support for (X >>s C) << C --> X & (-1 << C)

Differential Revision: https://reviews.llvm.org/D36743

llvm-svn: 310949

llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
index a19cdf7..45541c9 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
@@ -559,8 +559,8 @@
         return new ZExtInst(Builder.CreateShl(X, ShAmt), Ty);
     }
 
-    // (X >>u C) << C --> X & (-1 << C)
-    if (match(Op0, m_LShr(m_Value(X), m_Specific(Op1)))) {
+    // (X >> C) << C --> X & (-1 << C)
+    if (match(Op0, m_Shr(m_Value(X), m_Specific(Op1)))) {
       APInt Mask(APInt::getHighBitsSet(BitWidth, BitWidth - ShAmt));
       return BinaryOperator::CreateAnd(X, ConstantInt::get(Ty, Mask));
     }