commit 0529a8e2de9bbf2537bd636279d557a457b5fa65
author Matt Arsenault <Matthew.Arsenault@amd.com> Thu Mar 01 20:56:21 2018 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Thu Mar 01 20:56:21 2018 +0000
tree 816beafd6d710e27b8254ebf124eb60236656228
parent c61ff3bef1d87cb7ba37b087e6afea4ac563b5af

AMDGPU/GlobalISel: Mark i32->i64 zext as legal

llvm-svn: 326481

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index 4882cf4..adf263e 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -66,6 +66,9 @@
 
   setAction({G_FMUL, S32}, Legal);
 
+  setAction({G_ZEXT, S64}, Legal);
+  setAction({G_ZEXT, 1, S32}, Legal);
+
   setAction({G_FPTOSI, S32}, Legal);
   setAction({G_FPTOSI, 1, S32}, Legal);