commit 062a2baef02b0f2ed21aa5c5d61460ac02d2880b
author Craig Topper <craig.topper@gmail.com> Fri Apr 25 05:30:21 2014 +0000
committer Craig Topper <craig.topper@gmail.com> Fri Apr 25 05:30:21 2014 +0000
tree b5036bb342cded5422fa4d432562959b3be5086b
parent f40110f4d80436071213ed7fcbe367d64aa52c71

[C++] Use 'nullptr'. Target edition.

llvm-svn: 207197

llvm/lib/Target/Mips/MipsOptimizePICCall.cpp

diff --git a/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp b/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
index eead786..f06cadd 100644
--- a/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
+++ b/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
@@ -103,13 +103,13 @@
 /// Return the first MachineOperand of MI if it is a used virtual register.
 static MachineOperand *getCallTargetRegOpnd(MachineInstr &MI) {
   if (MI.getNumOperands() == 0)
-    return 0;
+    return nullptr;
 
   MachineOperand &MO = MI.getOperand(0);
 
   if (!MO.isReg() || !MO.isUse() ||
       !TargetRegisterInfo::isVirtualRegister(MO.getReg()))
-    return 0;
+    return nullptr;
 
   return &MO;
 }
@@ -158,7 +158,7 @@
   llvm_unreachable(0);
 }
 
-MBBInfo::MBBInfo(MachineDomTreeNode *N) : Node(N), HTScope(0) {}
+MBBInfo::MBBInfo(MachineDomTreeNode *N) : Node(N), HTScope(nullptr) {}
 
 const MachineDomTreeNode *MBBInfo::getNode() const { return Node; }
 
@@ -256,7 +256,7 @@
 
   // Get the instruction that loads the function address from the GOT.
   Reg = MO->getReg();
-  Val = (Value*)0;
+  Val = (Value*)nullptr;
   MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
   MachineInstr *DefMI = MRI.getVRegDef(Reg);