| commit | 063a56e81c89dfbf7896c71c8cd849b911eb7098 | [log] [tgz] |
|---|---|---|
| author | Tim Northover <tnorthover@apple.com> | Thu Feb 23 22:35:00 2017 +0000 |
| committer | Tim Northover <tnorthover@apple.com> | Thu Feb 23 22:35:00 2017 +0000 |
| tree | 1aab79ee7cf41c79efcf2d847aff161623d3c925 | |
| parent | 5cd9a9bf8c1859fcc8f67bcb2e73e0da1ee4d72c [diff] |
ARM: make sure FastISel bails on f64 operations for Cortex-M4. FastISel wasn't checking the isFPOnlySP subtarget feature before emitting double-precision operations, so it got completely invalid CodeGen for doubles on Cortex-M4F. The normal ISel testing wasn't spectacular either so I added a second RUN line to improve that while I was in the area. llvm-svn: 296031