[llvm-mca] Reformat a few lines (fix spacing). NFC.
llvm-svn: 340065
diff --git a/llvm/tools/llvm-mca/Instruction.h b/llvm/tools/llvm-mca/Instruction.h
index 66153cd..55dc644 100644
--- a/llvm/tools/llvm-mca/Instruction.h
+++ b/llvm/tools/llvm-mca/Instruction.h
@@ -423,9 +423,7 @@
bool isValid() const {
return Data.first != INVALID_IID && Data.second != nullptr;
}
- bool operator==(const WriteRef &Other) const {
- return Data == Other.Data;
- }
+ bool operator==(const WriteRef &Other) const { return Data == Other.Data; }
#ifndef NDEBUG
void dump() const;
diff --git a/llvm/tools/llvm-mca/Scheduler.cpp b/llvm/tools/llvm-mca/Scheduler.cpp
index 8597edf..ae8395b 100644
--- a/llvm/tools/llvm-mca/Scheduler.cpp
+++ b/llvm/tools/llvm-mca/Scheduler.cpp
@@ -313,7 +313,7 @@
// Scan the set of waiting instructions and promote them to the
// ready queue if operands are all ready.
unsigned RemovedElements = 0;
- for (auto I = WaitSet.begin(), E = WaitSet.end(); I != E; ) {
+ for (auto I = WaitSet.begin(), E = WaitSet.end(); I != E;) {
InstRef &IR = *I;
if (!IR.isValid())
break;
@@ -375,7 +375,7 @@
return InstRef();
// We found an instruction to issue.
-
+
InstRef IR = ReadySet[QueueIndex];
std::swap(ReadySet[QueueIndex], ReadySet[ReadySet.size() - 1]);
ReadySet.pop_back();
@@ -392,7 +392,7 @@
void Scheduler::updateIssuedSet(SmallVectorImpl<InstRef> &Executed) {
unsigned RemovedElements = 0;
- for (auto I = IssuedSet.begin(), E = IssuedSet.end(); I != E; ) {
+ for (auto I = IssuedSet.begin(), E = IssuedSet.end(); I != E;) {
InstRef &IR = *I;
if (!IR.isValid())
break;
diff --git a/llvm/tools/llvm-mca/Scheduler.h b/llvm/tools/llvm-mca/Scheduler.h
index ec7d5a0..018519d 100644
--- a/llvm/tools/llvm-mca/Scheduler.h
+++ b/llvm/tools/llvm-mca/Scheduler.h
@@ -313,7 +313,7 @@
void releaseBuffers(llvm::ArrayRef<uint64_t> Buffers);
// Reserve a processor resource. A reserved resource is not available for
- // instruction issue until it is released.
+ // instruction issue until it is released.
void reserveResource(uint64_t ResourceID);
// Release a previously reserved processor resource.