[SystemZ::TTI] Improve cost for compare of i64 with extended i32 load
CGF/CLGF compares an i64 register with a sign/zero extended loaded i32 value
in memory.
This patch makes such a load considered foldable and so gets a 0 cost.
Review: Ulrich Weigand
https://reviews.llvm.org/D54944
llvm-svn: 347735
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
index 362d2d3..32883ef 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
@@ -915,16 +915,19 @@
switch (UserI->getOpcode()) {
case Instruction::Add: // SE: 16->32, 16/32->64, z14:16->64. ZE: 32->64
case Instruction::Sub:
+ case Instruction::ICmp:
if (LoadedBits == 32 && ZExtBits == 64)
return true;
LLVM_FALLTHROUGH;
case Instruction::Mul: // SE: 16->32, 32->64, z14:16->64
- if (LoadedBits == 16 &&
- (SExtBits == 32 ||
- (SExtBits == 64 && ST->hasMiscellaneousExtensions2())))
- return true;
- if (LoadOrTruncBits == 16)
- return true;
+ if (UserI->getOpcode() != Instruction::ICmp) {
+ if (LoadedBits == 16 &&
+ (SExtBits == 32 ||
+ (SExtBits == 64 && ST->hasMiscellaneousExtensions2())))
+ return true;
+ if (LoadOrTruncBits == 16)
+ return true;
+ }
LLVM_FALLTHROUGH;
case Instruction::SDiv:// SE: 32->64
if (LoadedBits == 32 && SExtBits == 64)
@@ -934,7 +937,6 @@
case Instruction::And:
case Instruction::Or:
case Instruction::Xor:
- case Instruction::ICmp:
// This also makes sense for float operations, but disabled for now due
// to regressions.
// case Instruction::FCmp: