[ARM] Register ARMExpandPseudo pass.
This allows -run-pass etc. to refer to it.
(Split off from D35156.)
llvm-svn: 312587
diff --git a/llvm/lib/Target/ARM/ARM.h b/llvm/lib/Target/ARM/ARM.h
index 4676226..3aac689 100644
--- a/llvm/lib/Target/ARM/ARM.h
+++ b/llvm/lib/Target/ARM/ARM.h
@@ -60,6 +60,7 @@
void initializeARMLoadStoreOptPass(PassRegistry &);
void initializeARMPreAllocLoadStoreOptPass(PassRegistry &);
void initializeARMConstantIslandsPass(PassRegistry &);
+void initializeARMExpandPseudoPass(PassRegistry &);
} // end namespace llvm
diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
index 18fd077..ba44e01 100644
--- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
@@ -33,6 +33,8 @@
VerifyARMPseudo("verify-arm-pseudo-expand", cl::Hidden,
cl::desc("Verify machine code after expanding ARM pseudos"));
+#define ARM_EXPAND_PSEUDO_NAME "ARM pseudo instruction expansion pass"
+
namespace {
class ARMExpandPseudo : public MachineFunctionPass {
public:
@@ -52,7 +54,7 @@
}
StringRef getPassName() const override {
- return "ARM pseudo instruction expansion pass";
+ return ARM_EXPAND_PSEUDO_NAME;
}
private:
@@ -81,6 +83,9 @@
char ARMExpandPseudo::ID = 0;
}
+INITIALIZE_PASS(ARMExpandPseudo, DEBUG_TYPE, ARM_EXPAND_PSEUDO_NAME, false,
+ false)
+
/// TransferImpOps - Transfer implicit operands on the pseudo instruction to
/// the instructions created from the expansion.
void ARMExpandPseudo::TransferImpOps(MachineInstr &OldMI,
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index 71dc560..9a191e4 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -91,6 +91,7 @@
initializeARMPreAllocLoadStoreOptPass(Registry);
initializeARMConstantIslandsPass(Registry);
initializeARMExecutionDepsFixPass(Registry);
+ initializeARMExpandPseudoPass(Registry);
}
static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {