Split scheduling from instruction selection.
llvm-svn: 52923
diff --git a/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp b/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
index 283d693..0c967e2 100644
--- a/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
+++ b/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
@@ -66,7 +66,7 @@
SelectionDAGISel(MipsLowering),
TM(tm), MipsLowering(*TM.getTargetLowering()) {}
- virtual void InstructionSelectBasicBlock(SelectionDAG &SD);
+ virtual void InstructionSelect(SelectionDAG &SD);
// Pass Name
virtual const char *getPassName() const {
@@ -100,10 +100,10 @@
}
-/// InstructionSelectBasicBlock - This callback is invoked by
+/// InstructionSelect - This callback is invoked by
/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
void MipsDAGToDAGISel::
-InstructionSelectBasicBlock(SelectionDAG &SD)
+InstructionSelect(SelectionDAG &SD)
{
DEBUG(BB->dump());
// Codegen the basic block.
@@ -120,9 +120,6 @@
#endif
SD.RemoveDeadNodes();
-
- // Emit machine code to BB.
- ScheduleAndEmitDAG(SD);
}
/// getGlobalBaseReg - Output the instructions required to put the