commit 079f77b5906122d949b228e67ed5377233d838a2
author Matt Arsenault <Matthew.Arsenault@amd.com> Mon Jul 08 16:27:47 2019 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Mon Jul 08 16:27:47 2019 +0000
tree 703c05502c8b67d1e127536590a73fe6b6976a8a
parent 0b59103a73bf982deeebf943daa1846acf709e1f

GlobalISel: Convert some build functions to using SrcOp/DstOp

llvm-svn: 365343

llvm/lib/Target/Mips/MipsCallLowering.cpp

diff --git a/llvm/lib/Target/Mips/MipsCallLowering.cpp b/llvm/lib/Target/Mips/MipsCallLowering.cpp
index 8d14ecc..da65689 100644
--- a/llvm/lib/Target/Mips/MipsCallLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsCallLowering.cpp
@@ -109,9 +109,9 @@
     MIRBuilder.getMBB().addLiveIn(PhysReg);
   }
 
-  void buildLoad(unsigned Val, const CCValAssign &VA) {
+  void buildLoad(Register Val, const CCValAssign &VA) {
     MachineMemOperand *MMO;
-    unsigned Addr = getStackAddress(VA, MMO);
+    Register Addr = getStackAddress(VA, MMO);
     MIRBuilder.buildLoad(Val, Addr, *MMO);
   }
 };