AMDGPU: cvt_pk_rtz_f16 canonicalizes
llvm-svn: 339078
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index 7ccdcef..58370dc 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -4336,7 +4336,8 @@
// one?
return false;
}
- case AMDGPUISD::FMUL_LEGACY: {
+ case AMDGPUISD::FMUL_LEGACY:
+ case AMDGPUISD::CVT_PKRTZ_F16_F32: {
if (SNaN)
return true;
return DAG.isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1) &&
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index d43c297..0c6996a 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -6791,6 +6791,7 @@
case AMDGPUISD::DIV_FIXUP:
case AMDGPUISD::FRACT:
case AMDGPUISD::LDEXP:
+ case AMDGPUISD::CVT_PKRTZ_F16_F32:
return true;
// It can/will be lowered or combined as a bit operation.
@@ -6863,6 +6864,18 @@
case ISD::UNDEF:
// Could be anything.
return false;
+
+ case ISD::INTRINSIC_WO_CHAIN: {
+ unsigned IntrinsicID
+ = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
+ // TODO: Handle more intrinsics
+ switch (IntrinsicID) {
+ case Intrinsic::amdgcn_cvt_pkrtz:
+ return true;
+ default:
+ break;
+ }
+ }
default:
return denormalsEnabledForType(Op.getValueType()) &&
DAG.isKnownNeverSNaN(Op);
diff --git a/llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll b/llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
index 62ad4e5..0cba108 100644
--- a/llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
+++ b/llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
@@ -827,6 +827,16 @@
ret <2 x half> %canonicalized
}
+; GCN-LABEL: {{^}}v_test_canonicalize_cvt_pkrtz:
+; GCN: s_waitcnt
+; GCN-NEXT: v_cvt_pkrtz_f16_f32 v0, v0, v1
+; GCN-NEXT: s_setpc_b64
+define <2 x half> @v_test_canonicalize_cvt_pkrtz(float %a, float %b) {
+ %cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %a, float %b)
+ %canonicalized = call <2 x half> @llvm.canonicalize.v2f16(<2 x half> %cvt)
+ ret <2 x half> %canonicalized
+}
+
; Avoid failing the test on FreeBSD11.0 which will match the GCN-NOT: 1.0
; in the .amd_amdgpu_isa "amdgcn-unknown-freebsd11.0--gfx802" directive
; CHECK: .amd_amdgpu_isa
@@ -852,6 +862,7 @@
declare float @llvm.minnum.f32(float, float) #0
declare float @llvm.maxnum.f32(float, float) #0
declare double @llvm.maxnum.f64(double, double) #0
+declare <2 x half> @llvm.amdgcn.cvt.pkrtz(float, float) #0
attributes #0 = { nounwind readnone }
attributes #1 = { "no-nans-fp-math"="true" }