Fixed a bug in the IT mask printing where T means the cond bit in the mask
matches that of Firstcond[0] and E means otherwise.  The Firstcond[0] is also
tagged in the Mask to facilitate Asm printing.  The disassembler also depends
on this arrangement.  This is similar to what's described in A2.5.2 ITSTATE.

Ran:

utils/lit/lit.py test/CodeGen/ARM test/CodeGen/Thumb test/CodeGen/Thumb2

successfully.

llvm-svn: 98775
1 file changed
tree: 6f9d8a48cbd2255db56493f16cc527bd12106c05
  1. clang/
  2. compiler-rt/
  3. llvm/