commit 09cc429cb1e68533f1e3e55e43233e6099344c20
author Evan Cheng <evan.cheng@apple.com> Thu Jan 12 18:27:52 2012 +0000
committer Evan Cheng <evan.cheng@apple.com> Thu Jan 12 18:27:52 2012 +0000
tree 1a8a6d74a0d7dacf866c22d3ced80935f3f4c46d
parent 4a6e778aae31ab795255a880e0820d1290431060

Allow targets to select source order pre-RA scheduler.

llvm-svn: 148033

llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index bfb6dfa..9f39699 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -218,7 +218,8 @@
                                              CodeGenOpt::Level OptLevel) {
     const TargetLowering &TLI = IS->getTargetLowering();
 
-    if (OptLevel == CodeGenOpt::None)
+    if (OptLevel == CodeGenOpt::None ||
+        TLI.getSchedulingPreference() == Sched::Source)
       return createSourceListDAGScheduler(IS, OptLevel);
     if (TLI.getSchedulingPreference() == Sched::RegPressure)
       return createBURRListDAGScheduler(IS, OptLevel);