Use range algorithms instead of unpacking begin/end
No functionality change is intended.
llvm-svn: 278417
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index e505a75..d741525 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -6328,7 +6328,7 @@
EVT SubVT = SubV1.getValueType();
// We expect these to have been canonicalized to -1.
- assert(std::all_of(ShuffleMask.begin(), ShuffleMask.end(), [&](int i) {
+ assert(all_of(ShuffleMask, [&](int i) {
return i < (int)VT.getVectorNumElements();
}) && "Unexpected shuffle index into UNDEF operand!");
diff --git a/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp b/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp
index 5f008f5..e673892 100644
--- a/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp
@@ -245,7 +245,7 @@
if (&DA.Addr->getOp() != &Op)
continue;
Defs = DFG.getRelatedRefs(IA, DA);
- if (!std::all_of(Defs.begin(), Defs.end(), IsDead))
+ if (!all_of(Defs, IsDead))
return false;
break;
}
diff --git a/llvm/lib/Target/Hexagon/RDFGraph.cpp b/llvm/lib/Target/Hexagon/RDFGraph.cpp
index 5070d9c..156bbda 100644
--- a/llvm/lib/Target/Hexagon/RDFGraph.cpp
+++ b/llvm/lib/Target/Hexagon/RDFGraph.cpp
@@ -1509,7 +1509,7 @@
bool PrecUp = RAI.covers(QR, RR);
// Skip all defs that are aliased to any of the defs that we have already
// seen. If we encounter a covering def, stop the stack traversal early.
- if (std::any_of(Defs.begin(), Defs.end(), AliasQR)) {
+ if (any_of(Defs, AliasQR)) {
if (PrecUp)
break;
continue;
diff --git a/llvm/lib/Target/Hexagon/RDFLiveness.cpp b/llvm/lib/Target/Hexagon/RDFLiveness.cpp
index 641f014..e25596b 100644
--- a/llvm/lib/Target/Hexagon/RDFLiveness.cpp
+++ b/llvm/lib/Target/Hexagon/RDFLiveness.cpp
@@ -400,7 +400,7 @@
for (auto I = Uses.begin(), E = Uses.end(); I != E; ) {
auto UA = DFG.addr<UseNode*>(*I);
NodeList RDs = getAllReachingDefs(UI->first, UA);
- if (std::any_of(RDs.begin(), RDs.end(), HasDef))
+ if (any_of(RDs, HasDef))
++I;
else
I = Uses.erase(I);
diff --git a/llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp b/llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
index 56fecb4..b0c7bed 100644
--- a/llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
+++ b/llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
@@ -134,8 +134,7 @@
};
const auto &Users = P->users();
const auto &Operands = P->operands();
- if (!std::all_of(Users.begin(), Users.end(), IsValidUser) ||
- !std::all_of(Operands.begin(), Operands.end(), IsValidOperand))
+ if (!all_of(Users, IsValidUser) || !all_of(Operands, IsValidOperand))
ToRemove.push_back(P);
}
@@ -153,8 +152,7 @@
// Condition 4 and 5
const auto &Users = P->users();
const auto &Operands = P->operands();
- if (!std::all_of(Users.begin(), Users.end(), IsPromotable) ||
- !std::all_of(Operands.begin(), Operands.end(), IsPromotable))
+ if (!all_of(Users, IsPromotable) || !all_of(Operands, IsPromotable))
ToRemove.push_back(P);
}
}
@@ -199,7 +197,7 @@
auto Defs = findAllDefs(U);
// If the values are all Constants or Arguments, don't bother
- if (!std::any_of(Defs.begin(), Defs.end(), isa<Instruction, Value *>))
+ if (none_of(Defs, isa<Instruction, Value *>))
return false;
// Presently, we only know how to handle PHINode, Constant, Arguments and
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 2ccbcd9..2e1df66 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -4060,8 +4060,7 @@
return false;
// Functions containing by val parameters are not supported.
- if (std::any_of(Ins.begin(), Ins.end(),
- [](const ISD::InputArg& IA) { return IA.Flags.isByVal(); }))
+ if (any_of(Ins, [](const ISD::InputArg &IA) { return IA.Flags.isByVal(); }))
return false;
// No TCO/SCO on indirect call because Caller have to restore its TOC
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 771dfdb..2e66121 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -4821,7 +4821,7 @@
// We can always decode if the buildvector is all zero constants,
// but can't use isBuildVectorAllZeros as it might contain UNDEFs.
- if (llvm::all_of(MaskNode->ops(), X86::isZeroNode)) {
+ if (all_of(MaskNode->ops(), X86::isZeroNode)) {
RawMask.append(VT.getSizeInBits() / MaskEltSizeInBits, 0);
return true;
}
@@ -5087,7 +5087,7 @@
// Check if we're getting a shuffle mask with zero'd elements.
if (!AllowSentinelZero)
- if (llvm::any_of(Mask, [](int M) { return M == SM_SentinelZero; }))
+ if (any_of(Mask, [](int M) { return M == SM_SentinelZero; }))
return false;
// If we have a fake unary shuffle, the shuffle mask is spread across two
@@ -5197,11 +5197,10 @@
return false;
int NumElts = Mask.size();
- bool Op0InUse = std::any_of(Mask.begin(), Mask.end(), [NumElts](int Idx) {
+ bool Op0InUse = any_of(Mask, [NumElts](int Idx) {
return 0 <= Idx && Idx < NumElts;
});
- bool Op1InUse = std::any_of(Mask.begin(), Mask.end(),
- [NumElts](int Idx) { return NumElts <= Idx; });
+ bool Op1InUse = any_of(Mask, [NumElts](int Idx) { return NumElts <= Idx; });
Op0 = Op0InUse ? Ops[0] : SDValue();
Op1 = Op1InUse ? Ops[1] : SDValue();
@@ -10352,8 +10351,8 @@
// with a pack.
SDValue V = V1;
- int LoBlendMask[8] = {-1, -1, -1, -1, -1, -1, -1, -1};
- int HiBlendMask[8] = {-1, -1, -1, -1, -1, -1, -1, -1};
+ std::array<int, 8> LoBlendMask = {{-1, -1, -1, -1, -1, -1, -1, -1}};
+ std::array<int, 8> HiBlendMask = {{-1, -1, -1, -1, -1, -1, -1, -1}};
for (int i = 0; i < 16; ++i)
if (Mask[i] >= 0)
(i < 8 ? LoBlendMask[i] : HiBlendMask[i % 8]) = Mask[i];
@@ -10364,10 +10363,8 @@
// Check if any of the odd lanes in the v16i8 are used. If not, we can mask
// them out and avoid using UNPCK{L,H} to extract the elements of V as
// i16s.
- if (std::none_of(std::begin(LoBlendMask), std::end(LoBlendMask),
- [](int M) { return M >= 0 && M % 2 == 1; }) &&
- std::none_of(std::begin(HiBlendMask), std::end(HiBlendMask),
- [](int M) { return M >= 0 && M % 2 == 1; })) {
+ if (none_of(LoBlendMask, [](int M) { return M >= 0 && M % 2 == 1; }) &&
+ none_of(HiBlendMask, [](int M) { return M >= 0 && M % 2 == 1; })) {
// Use a mask to drop the high bytes.
VLoHalf = DAG.getBitcast(MVT::v8i16, V);
VLoHalf = DAG.getNode(ISD::AND, DL, MVT::v8i16, VLoHalf,
@@ -14338,9 +14335,8 @@
Opcode == X86ISD::CMPP);
};
- if (IsPackableComparison(In) ||
- (In.getOpcode() == ISD::CONCAT_VECTORS &&
- std::all_of(In->op_begin(), In->op_end(), IsPackableComparison))) {
+ if (IsPackableComparison(In) || (In.getOpcode() == ISD::CONCAT_VECTORS &&
+ all_of(In->ops(), IsPackableComparison))) {
if (SDValue V = truncateVectorCompareWithPACKSS(VT, In, DL, DAG, Subtarget))
return V;
}
@@ -25282,7 +25278,7 @@
return false;
bool MaskContainsZeros =
- llvm::any_of(Mask, [](int M) { return M == SM_SentinelZero; });
+ any_of(Mask, [](int M) { return M == SM_SentinelZero; });
// If we have a single input shuffle with different shuffle patterns in the
// the 128-bit lanes use the variable mask to VPERMILPS.
@@ -25578,11 +25574,11 @@
}
// Handle the all undef/zero cases early.
- if (llvm::all_of(Mask, [](int Idx) { return Idx == SM_SentinelUndef; })) {
+ if (all_of(Mask, [](int Idx) { return Idx == SM_SentinelUndef; })) {
DCI.CombineTo(Root.getNode(), DAG.getUNDEF(Root.getValueType()));
return true;
}
- if (llvm::all_of(Mask, [](int Idx) { return Idx < 0; })) {
+ if (all_of(Mask, [](int Idx) { return Idx < 0; })) {
// TODO - should we handle the mixed zero/undef case as well? Just returning
// a zero mask will lose information on undef elements possibly reducing
// future combine possibilities.
@@ -25596,8 +25592,7 @@
for (int i = 0, e = Ops.size(); i < e; ++i) {
int lo = UsedOps.size() * MaskWidth;
int hi = lo + MaskWidth;
- if (std::any_of(Mask.begin(), Mask.end(),
- [lo, hi](int i) { return (lo <= i) && (i < hi); })) {
+ if (any_of(Mask, [lo, hi](int i) { return (lo <= i) && (i < hi); })) {
UsedOps.push_back(Ops[i]);
continue;
}
@@ -30124,7 +30119,7 @@
MVT InSVT = InVT.getScalarType();
assert(DAG.getTargetLoweringInfo().getBooleanContents(InVT) ==
- llvm::TargetLoweringBase::ZeroOrNegativeOneBooleanContent &&
+ TargetLoweringBase::ZeroOrNegativeOneBooleanContent &&
"Expected comparison result to be zero/all bits");
// Check we have a truncation suited for PACKSS.