commit 0a1fd355b2f6fb971fbf4108be623b01c65e57c4
author Petar Avramovic <Petar.Avramovic@rt-rk.com> Thu Jun 06 09:22:37 2019 +0000
committer Petar Avramovic <Petar.Avramovic@rt-rk.com> Thu Jun 06 09:22:37 2019 +0000
tree 06434421cd492b746f9f29f600c9824f4d1a608f
parent a7d000644745471a9a7b403f1fdedb773c2b4af0

[MIPS GlobalISel] Select fabs

Select G_FABS for MIPS32.

Differential Revision: https://reviews.llvm.org/D62903

llvm-svn: 362690

llvm/lib/Target/Mips/MipsInstructionSelector.cpp

diff --git a/llvm/lib/Target/Mips/MipsInstructionSelector.cpp b/llvm/lib/Target/Mips/MipsInstructionSelector.cpp
index 8fddcca..ea9b2e5 100644
--- a/llvm/lib/Target/Mips/MipsInstructionSelector.cpp
+++ b/llvm/lib/Target/Mips/MipsInstructionSelector.cpp
@@ -357,6 +357,16 @@
     I.eraseFromParent();
     return true;
   }
+  case G_FABS: {
+    unsigned Size = MRI.getType(I.getOperand(0).getReg()).getSizeInBits();
+    unsigned FABSOpcode =
+        Size == 32 ? Mips::FABS_S
+                   : STI.isFP64bit() ? Mips::FABS_D64 : Mips::FABS_D32;
+    MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(FABSOpcode))
+             .add(I.getOperand(0))
+             .add(I.getOperand(1));
+    break;
+  }
   case G_GLOBAL_VALUE: {
     const llvm::GlobalValue *GVal = I.getOperand(1).getGlobal();
     if (MF.getTarget().isPositionIndependent()) {

llvm/lib/Target/Mips/MipsLegalizerInfo.cpp

diff --git a/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp b/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
index 146ee754..9161a0f 100644
--- a/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
@@ -94,7 +94,7 @@
   getActionDefinitionsBuilder(G_FCONSTANT)
       .legalFor({s32, s64});
 
-  getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV})
+  getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV, G_FABS})
       .legalFor({s32, s64});
 
   getActionDefinitionsBuilder(G_FCMP)

llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp

diff --git a/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp b/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
index 6a4ffe1..3ac81f7 100644
--- a/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
@@ -133,7 +133,8 @@
   case G_FADD:
   case G_FSUB:
   case G_FMUL:
-  case G_FDIV: {
+  case G_FDIV:
+  case G_FABS: {
     unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits();
     assert((Size == 32 || Size == 64) && "Unsupported floating point size");
     OperandsMapping = Size == 32 ? &Mips::ValueMappings[Mips::SPRIdx]