commit 0b5db55b963a69d45f5712935c60d1ec8e69a511
author Michael Zuckerman <Michael.zuckerman@intel.com> Fri Sep 29 12:45:54 2017 +0000
committer Michael Zuckerman <Michael.zuckerman@intel.com> Fri Sep 29 12:45:54 2017 +0000
tree cfcc58ff49b1daec9d39bb171966c7d93c3ef130
parent 80275fef32524450a7b640c407e127319b9616ed

Small modification <NFC>

Change-Id: I360abccee12cae29bd2ac4f8399c9ecc92eb7f13
llvm-svn: 314510

llvm/lib/Target/X86/X86InterleavedAccess.cpp

diff --git a/llvm/lib/Target/X86/X86InterleavedAccess.cpp b/llvm/lib/Target/X86/X86InterleavedAccess.cpp
index ff7244f..e93ec27 100644
--- a/llvm/lib/Target/X86/X86InterleavedAccess.cpp
+++ b/llvm/lib/Target/X86/X86InterleavedAccess.cpp
@@ -536,7 +536,7 @@
 // By computing the shuffle on a sequence of 16 elements(one lane) and add the
 // correct offset. We are creating a vpsuffed + blend sequence between two
 // shuffles.
-static void genShuffleBland(MVT VT, SmallVectorImpl<uint32_t> &Mask,
+static void genShuffleBland(MVT VT, ArrayRef<uint32_t> Mask,
                             SmallVectorImpl<uint32_t> &Out, int LowOffset,
                             int HighOffset) {
   assert(VT.getSizeInBits() == 256 &&