commit 0bbcd8ba2f176ecefa96421391207b1b0beadf26
author Matt Arsenault <Matthew.Arsenault@amd.com> Sat Feb 14 04:30:08 2015 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Sat Feb 14 04:30:08 2015 +0000
tree 96928cccd3f0cc0113001d8abf0d52fbdcce2590
parent 044f1d19cf87aaacd0e1eec85a85a7c5e2b1578d

R600/SI: Implement correct f64 fdiv

This version passes the OpenCL conformance test.

llvm-svn: 229239

llvm/lib/Target/R600/R600Instructions.td

diff --git a/llvm/lib/Target/R600/R600Instructions.td b/llvm/lib/Target/R600/R600Instructions.td
index 99097c4..37c40d5 100644
--- a/llvm/lib/Target/R600/R600Instructions.td
+++ b/llvm/lib/Target/R600/R600Instructions.td
@@ -1184,7 +1184,7 @@
   def TGSI_LIT_Z_r600 : TGSI_LIT_Z_Common<MUL_LIT_r600, LOG_CLAMPED_r600, EXP_IEEE_r600>;
 
   def : Pat<(fsqrt f32:$src), (MUL $src, (RECIPSQRT_CLAMPED_r600 $src))>;
-  defm : RsqPat<RECIPSQRT_IEEE_r600, f32>;
+  def : RsqPat<RECIPSQRT_IEEE_r600, f32>;
 
   def R600_ExportSwz : ExportSwzInst {
     let Word1{20-17} = 0; // BURST_COUNT