Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
Summary:
This clang-tidy check is looking for unsigned integer variables whose initializer
starts with an implicit cast from llvm::Register and changes the type of the
variable to llvm::Register (dropping the llvm:: where possible).
Partial reverts in:
X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister
X86FixupLEAs.cpp - Some functions return unsigned and arguably should be MCRegister
X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister
HexagonBitSimplify.cpp - Function takes BitTracker::RegisterRef which appears to be unsigned&
MachineVerifier.cpp - Ambiguous operator==() given MCRegister and const Register
PPCFastISel.cpp - No Register::operator-=()
PeepholeOptimizer.cpp - TargetInstrInfo::optimizeLoadInstr() takes an unsigned&
MachineTraceMetrics.cpp - MachineTraceMetrics lacks a suitable constructor
Manual fixups in:
ARMFastISel.cpp - ARMEmitLoad() now takes a Register& instead of unsigned&
HexagonSplitDouble.cpp - Ternary operator was ambiguous between unsigned/Register
HexagonConstExtenders.cpp - Has a local class named Register, used llvm::Register instead of Register.
PPCFastISel.cpp - PPCEmitLoad() now takes a Register& instead of unsigned&
Depends on D65919
Reviewers: arsenm, bogner, craig.topper, RKSimon
Reviewed By: arsenm
Subscribers: RKSimon, craig.topper, lenary, aemerson, wuzish, jholewinski, MatzeB, qcolombet, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, wdng, nhaehnle, sbc100, jgravelle-google, kristof.beyls, hiraditya, aheejin, kbarton, fedor.sergeev, javed.absar, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, tpr, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, Jim, s.egerton, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D65962
llvm-svn: 369041
diff --git a/llvm/lib/CodeGen/LivePhysRegs.cpp b/llvm/lib/CodeGen/LivePhysRegs.cpp
index 9836d3d..c2a1cc7 100644
--- a/llvm/lib/CodeGen/LivePhysRegs.cpp
+++ b/llvm/lib/CodeGen/LivePhysRegs.cpp
@@ -46,7 +46,7 @@
if (O->isReg()) {
if (!O->isDef() || O->isDebug())
continue;
- unsigned Reg = O->getReg();
+ Register Reg = O->getReg();
if (!Register::isPhysicalRegister(Reg))
continue;
removeReg(Reg);
@@ -60,7 +60,7 @@
for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
if (!O->isReg() || !O->readsReg() || O->isDebug())
continue;
- unsigned Reg = O->getReg();
+ Register Reg = O->getReg();
if (!Register::isPhysicalRegister(Reg))
continue;
addReg(Reg);
@@ -86,7 +86,7 @@
// Remove killed registers from the set.
for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
if (O->isReg() && !O->isDebug()) {
- unsigned Reg = O->getReg();
+ Register Reg = O->getReg();
if (!Register::isPhysicalRegister(Reg))
continue;
if (O->isDef()) {
@@ -292,7 +292,7 @@
if (!MO->isReg() || !MO->isDef() || MO->isDebug())
continue;
- unsigned Reg = MO->getReg();
+ Register Reg = MO->getReg();
if (Reg == 0)
continue;
assert(Register::isPhysicalRegister(Reg));
@@ -309,7 +309,7 @@
if (!MO->isReg() || !MO->readsReg() || MO->isDebug())
continue;
- unsigned Reg = MO->getReg();
+ Register Reg = MO->getReg();
if (Reg == 0)
continue;
assert(Register::isPhysicalRegister(Reg));