commit 0d79aaf1a7303cc0840563d7ed3a2f2cf2bab25f
author Clement Courbet <courbet@google.com> Thu Nov 08 12:09:45 2018 +0000
committer Clement Courbet <courbet@google.com> Thu Nov 08 12:09:45 2018 +0000
tree 55d51b4eb237922d3849b7a12939c1a51838ff0d
parent 266c087b9dff314433f318a9ef61ec7d1b44fbb4

Revert "[llvm-exegesis] Add a snippet generator to generate snippets to compute ROB sizes."

This reverts accidental commit rL346394.

llvm-svn: 346398

llvm/tools/llvm-exegesis/lib/Assembler.cpp

diff --git a/llvm/tools/llvm-exegesis/lib/Assembler.cpp b/llvm/tools/llvm-exegesis/lib/Assembler.cpp
index b0758d4..2e3712c 100644
--- a/llvm/tools/llvm-exegesis/lib/Assembler.cpp
+++ b/llvm/tools/llvm-exegesis/lib/Assembler.cpp
@@ -32,19 +32,10 @@
 static std::vector<llvm::MCInst>
 generateSnippetSetupCode(const ExegesisTarget &ET,
                          const llvm::MCSubtargetInfo *const MSI,
-                         const unsigned ScratchReg,
-                         llvm::ArrayRef<unsigned> ScratchRegisterCopies,
                          llvm::ArrayRef<RegisterValue> RegisterInitialValues,
                          bool &IsSnippetSetupComplete) {
   IsSnippetSetupComplete = true;
   std::vector<llvm::MCInst> Result;
-  // Copy registers.
-  for (const unsigned Reg : ScratchRegisterCopies) {
-    assert(ScratchReg > 0 && "scratch reg copies but no scratch reg");
-    const auto CopyRegisterCode = ET.copyReg(*MSI, Reg, ScratchReg);
-    Result.insert(Result.end(), CopyRegisterCode.begin(), CopyRegisterCode.end());
-  }
-  // Load values in registers.
   for (const RegisterValue &RV : RegisterInitialValues) {
     // Load a constant in the register.
     const auto SetRegisterCode = ET.setRegTo(*MSI, RV.Register, RV.Value);
@@ -164,7 +155,6 @@
 void assembleToStream(const ExegesisTarget &ET,
                       std::unique_ptr<llvm::LLVMTargetMachine> TM,
                       llvm::ArrayRef<unsigned> LiveIns,
-                      llvm::ArrayRef<unsigned> ScratchRegisterCopies,
                       llvm::ArrayRef<RegisterValue> RegisterInitialValues,
                       llvm::ArrayRef<llvm::MCInst> Instructions,
                       llvm::raw_pwrite_stream &AsmStream) {
@@ -188,7 +178,7 @@
 
   bool IsSnippetSetupComplete;
   std::vector<llvm::MCInst> Code =
-      generateSnippetSetupCode(ET, TM->getMCSubtargetInfo(), ET.getScratchMemoryRegister(TM->getTargetTriple()), ScratchRegisterCopies,
+      generateSnippetSetupCode(ET, TM->getMCSubtargetInfo(),
                                RegisterInitialValues, IsSnippetSetupComplete);
 
   Code.insert(Code.end(), Instructions.begin(), Instructions.end());
@@ -209,7 +199,7 @@
   llvm::MCContext &MCContext = MMI->getContext();
   llvm::legacy::PassManager PM;
 
-  llvm::TargetLibraryInfoImpl TLII(Triple(Module->getTargetTriple()));
+  llvm::TargetLibraryInfoImpl TLII(llvm::Triple(Module->getTargetTriple()));
   PM.add(new llvm::TargetLibraryInfoWrapperPass(TLII));
 
   llvm::TargetPassConfig *TPC = TM->createPassConfig(PM);