Revert "[llvm-exegesis] Add a snippet generator to generate snippets to compute ROB sizes."
This reverts accidental commit rL346394.
llvm-svn: 346398
diff --git a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
index b8c5626..eb6a857 100644
--- a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
+++ b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
@@ -56,9 +56,8 @@
}
if (CT.ScratchSpacePointerInReg)
BC.LiveIns.push_back(CT.ScratchSpacePointerInReg);
- BC.ScratchRegisterCopies = CT.ScratchRegisterCopies;
BC.RegisterInitialValues =
- computeRegisterInitialValues(BC.ScratchRegisterCopies, CT.Instructions);
+ computeRegisterInitialValues(CT.Instructions);
Output.push_back(std::move(BC));
}
}
@@ -68,15 +67,12 @@
}
std::vector<RegisterValue> SnippetGenerator::computeRegisterInitialValues(
- const std::vector<unsigned> &ScratchRegisterCopies,
const std::vector<InstructionTemplate> &Instructions) const {
// Collect all register uses and create an assignment for each of them.
// Ignore memory operands which are handled separately.
// Loop invariant: DefinedRegs[i] is true iif it has been set at least once
// before the current instruction.
llvm::BitVector DefinedRegs = State.getRATC().emptyRegisters();
- for (const auto& Reg : ScratchRegisterCopies)
- DefinedRegs.set(Reg);
std::vector<RegisterValue> RIV;
for (const InstructionTemplate &IT : Instructions) {
// Returns the register that this Operand sets or uses, or 0 if this is not
@@ -95,7 +91,7 @@
if (Op.isUse()) {
const unsigned Reg = GetOpReg(Op);
if (Reg > 0 && !DefinedRegs.test(Reg)) {
- RIV.push_back(RegisterValue::zero(Reg));
+ RIV.push_back(RegisterValue{Reg, llvm::APInt()});
DefinedRegs.set(Reg);
}
}