commit 0e6694d111b6d3c0438f2b72fab6d10b7b4eab6c
author Adrian Prantl <aprantl@apple.com> Tue Dec 19 22:05:25 2017 +0000
committer Adrian Prantl <aprantl@apple.com> Tue Dec 19 22:05:25 2017 +0000
tree 1f121135fb5c07575653076be40e123c9d247244
parent f81727d138b3b216c4db06ab8b01d67de6580525

Silence a bunch of implicit fallthrough warnings

llvm-svn: 321114

llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp

diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index 3103709..d799544 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -2033,6 +2033,7 @@
     }
   }
   // else fallthrough
+  LLVM_FALLTHROUGH;
 
   // The MC library also has a right-shift operator, but it isn't consistently
   // signed or unsigned between different targets.

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 0917342..2dbcc1f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -10201,7 +10201,7 @@
       case ISD::SETLT:
       case ISD::SETLE:
         std::swap(TrueOpnd, FalseOpnd);
-        // Fall through
+        LLVM_FALLTHROUGH;
       case ISD::SETOGT:
       case ISD::SETUGT:
       case ISD::SETOGE:

llvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp

diff --git a/llvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp b/llvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp
index 379f0dc..7f369c7 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp
@@ -252,6 +252,7 @@
       if (!ResourcesModel->canReserveResources(&TII->get(
           SU->getNode()->getMachineOpcode())))
            return false;
+      break;
     case TargetOpcode::EXTRACT_SUBREG:
     case TargetOpcode::INSERT_SUBREG:
     case TargetOpcode::SUBREG_TO_REG: