[llvm-exegesis][NFC] Remove unnecessary member variables.
llvm-svn: 335470
diff --git a/llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp b/llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
index 94b2473..5223fba 100644
--- a/llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
+++ b/llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
@@ -29,9 +29,8 @@
BenchmarkRunner::InstructionFilter::~InstructionFilter() = default;
BenchmarkRunner::BenchmarkRunner(const LLVMState &State)
- : State(State), MCInstrInfo(State.getInstrInfo()),
- MCRegisterInfo(State.getRegInfo()),
- RATC(MCRegisterInfo, getFunctionReservedRegs(State.getTargetMachine())) {}
+ : State(State),
+ RATC(State.getRegInfo(), getFunctionReservedRegs(State.getTargetMachine())) {}
BenchmarkRunner::~BenchmarkRunner() = default;
diff --git a/llvm/tools/llvm-exegesis/lib/BenchmarkRunner.h b/llvm/tools/llvm-exegesis/lib/BenchmarkRunner.h
index 4e8ba502..6d1da9e 100644
--- a/llvm/tools/llvm-exegesis/lib/BenchmarkRunner.h
+++ b/llvm/tools/llvm-exegesis/lib/BenchmarkRunner.h
@@ -80,8 +80,6 @@
protected:
const LLVMState &State;
- const llvm::MCInstrInfo &MCInstrInfo;
- const llvm::MCRegisterInfo &MCRegisterInfo;
const RegisterAliasingTrackerCache RATC;
private:
diff --git a/llvm/tools/llvm-exegesis/lib/Latency.cpp b/llvm/tools/llvm-exegesis/lib/Latency.cpp
index a221323..3cc0d85 100644
--- a/llvm/tools/llvm-exegesis/lib/Latency.cpp
+++ b/llvm/tools/llvm-exegesis/lib/Latency.cpp
@@ -72,13 +72,13 @@
const Instruction &Instr,
const AliasingConfigurations &SelfAliasing) const {
std::vector<unsigned> Opcodes;
- Opcodes.resize(MCInstrInfo.getNumOpcodes());
+ Opcodes.resize(State.getInstrInfo().getNumOpcodes());
std::iota(Opcodes.begin(), Opcodes.end(), 0U);
std::shuffle(Opcodes.begin(), Opcodes.end(), randomGenerator());
for (const unsigned OtherOpcode : Opcodes) {
if (OtherOpcode == Instr.Description->Opcode)
continue;
- const auto &OtherInstrDesc = MCInstrInfo.get(OtherOpcode);
+ const auto &OtherInstrDesc = State.getInstrInfo().get(OtherOpcode);
if (auto E = isInfeasible(OtherInstrDesc)) {
llvm::consumeError(std::move(E));
continue;
@@ -96,7 +96,7 @@
setRandomAliasing(Back, OtherII, ThisII);
SnippetPrototype Prototype;
Prototype.Explanation = llvm::formatv("creating cycle through {0}.",
- MCInstrInfo.getName(OtherOpcode));
+ State.getInstrInfo().getName(OtherOpcode));
Prototype.Snippet.push_back(std::move(ThisII));
Prototype.Snippet.push_back(std::move(OtherII));
return std::move(Prototype);
@@ -107,7 +107,7 @@
llvm::Expected<SnippetPrototype>
LatencyBenchmarkRunner::generatePrototype(unsigned Opcode) const {
- const auto &InstrDesc = MCInstrInfo.get(Opcode);
+ const auto &InstrDesc = State.getInstrInfo().get(Opcode);
if (auto E = isInfeasible(InstrDesc))
return std::move(E);
const Instruction Instr(InstrDesc, RATC);
diff --git a/llvm/tools/llvm-exegesis/lib/Uops.cpp b/llvm/tools/llvm-exegesis/lib/Uops.cpp
index 349f5f4..677a9d3 100644
--- a/llvm/tools/llvm-exegesis/lib/Uops.cpp
+++ b/llvm/tools/llvm-exegesis/lib/Uops.cpp
@@ -139,7 +139,7 @@
llvm::Expected<SnippetPrototype>
UopsBenchmarkRunner::generatePrototype(unsigned Opcode) const {
- const auto &InstrDesc = MCInstrInfo.get(Opcode);
+ const auto &InstrDesc = State.getInstrInfo().get(Opcode);
if (auto E = isInfeasible(InstrDesc))
return std::move(E);
const Instruction Instr(InstrDesc, RATC);
@@ -179,7 +179,7 @@
}
InstructionInstance II(Instr);
// No tied variables, we pick random values for defs.
- llvm::BitVector Defs(MCRegisterInfo.getNumRegs());
+ llvm::BitVector Defs(State.getRegInfo().getNumRegs());
for (const auto &Op : Instr.Operands) {
if (Op.Tracker && Op.IsExplicit && Op.IsDef) {
auto PossibleRegisters = Op.Tracker->sourceBits();
@@ -191,7 +191,7 @@
}
}
// And pick random use values that are not reserved and don't alias with defs.
- const auto DefAliases = getAliasedBits(MCRegisterInfo, Defs);
+ const auto DefAliases = getAliasedBits(State.getRegInfo(), Defs);
for (const auto &Op : Instr.Operands) {
if (Op.Tracker && Op.IsExplicit && !Op.IsDef) {
auto PossibleRegisters = Op.Tracker->sourceBits();