GlobalISel: move type information to MachineRegisterInfo.
We want each register to have a canonical type, which means the best place to
store this is in MachineRegisterInfo rather than on every MachineInstr that
happens to use or define that register.
Most changes following from this are pretty simple (you need an MRI anyway if
you're going to be doing any transformations, so just check the type there).
But legalization doesn't really want to check redundant operands (when, for
example, a G_ADD only ever has one type) so I've made use of MCInstrDesc's
operand type field to encode these constraints and limit legalization's work.
As an added bonus, more validation is possible, both in MachineVerifier and
MachineIRBuilder (coming soon).
llvm-svn: 281035
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index 49620e7..f063942 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -887,16 +887,24 @@
}
// Check types.
- const unsigned NumTypes = MI->getNumTypes();
if (isPreISelGenericOpcode(MCID.getOpcode())) {
if (isFunctionSelected)
report("Unexpected generic instruction in a Selected function", MI);
- if (NumTypes == 0)
- report("Generic instruction must have a type", MI);
- } else {
- if (NumTypes != 0)
- report("Non-generic instruction cannot have a type", MI);
+ // Generic instructions specify equality constraints between some
+ // of their operands. Make sure these are consistent.
+ SmallVector<LLT, 4> Types;
+ for (unsigned i = 0; i < MCID.getNumOperands(); ++i) {
+ if (!MCID.OpInfo[i].isGenericType())
+ continue;
+ size_t TypeIdx = MCID.OpInfo[i].getGenericTypeIndex();
+ Types.resize(std::max(TypeIdx + 1, Types.size()));
+
+ LLT OpTy = MRI->getType(MI->getOperand(i).getReg());
+ if (Types[TypeIdx].isValid() && Types[TypeIdx] != OpTy)
+ report("type mismatch in generic instruction", MI);
+ Types[TypeIdx] = OpTy;
+ }
}
// Generic opcodes must not have physical register operands.
@@ -1026,9 +1034,10 @@
}
// The gvreg must have a size and it must not have a SubIdx.
- unsigned Size = MRI->getSize(Reg);
- if (!Size) {
- report("Generic virtual register must have a size", MO, MONum);
+ LLT Ty = MRI->getType(Reg);
+ if (!Ty.isValid()) {
+ report("Generic virtual register must have a valid type", MO,
+ MONum);
return;
}
@@ -1043,15 +1052,18 @@
}
// Make sure the register fits into its register bank if any.
- if (RegBank && RegBank->getSize() < Size) {
+ if (RegBank && Ty.isSized() &&
+ RegBank->getSize() < Ty.getSizeInBits()) {
report("Register bank is too small for virtual register", MO,
MONum);
errs() << "Register bank " << RegBank->getName() << " too small("
- << RegBank->getSize() << ") to fit " << Size << "-bits\n";
+ << RegBank->getSize() << ") to fit " << Ty.getSizeInBits()
+ << "-bits\n";
return;
}
if (SubIdx) {
- report("Generic virtual register does not subregister index", MO, MONum);
+ report("Generic virtual register does not subregister index", MO,
+ MONum);
return;
}
break;