commit 10268f93e8df5e8ee3f992152df881f3833170a7
author Matt Arsenault <Matthew.Arsenault@amd.com> Mon Feb 27 22:40:39 2017 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Mon Feb 27 22:40:39 2017 +0000
tree 40f3108c397acdfdd4d3198ae323171198339c58
parent 3bc39016cddeca90879bf2e4022190c3fd7a0831

AMDGPU: Use v_med3_{f16|i16|u16}

llvm-svn: 296401

llvm/lib/Target/AMDGPU/SIISelLowering.h

diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.h b/llvm/lib/Target/AMDGPU/SIISelLowering.h
index 5bf3906..984640d 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.h
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.h
@@ -86,6 +86,8 @@
 
   SDValue performFPMed3ImmCombine(SelectionDAG &DAG, const SDLoc &SL,
                                   SDValue Op0, SDValue Op1) const;
+  SDValue performIntMed3ImmCombine(SelectionDAG &DAG, const SDLoc &SL,
+                                   SDValue Op0, SDValue Op1, bool Signed) const;
   SDValue performMinMaxCombine(SDNode *N, DAGCombinerInfo &DCI) const;
   SDValue performFMed3Combine(SDNode *N, DAGCombinerInfo &DCI) const;
   SDValue performCvtPkRTZCombine(SDNode *N, DAGCombinerInfo &DCI) const;