commit 10b71c0d08095e256aa3ed8e088abb41087ca24e
author Chris Lattner <sabre@nondot.org> Thu May 04 18:05:43 2006 +0000
committer Chris Lattner <sabre@nondot.org> Thu May 04 18:05:43 2006 +0000
tree 8f68c2d63e5d29943fce5b09763c105b36f36a0e
parent 700cd27e834f6bb2a2af98c08edf82de487361a3

Rename MO_VirtualRegister -> MO_Register.  Clean up immediate handling.

llvm-svn: 28104

llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp

diff --git a/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp b/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
index e51b784..59a8505 100644
--- a/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
+++ b/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
@@ -77,7 +77,7 @@
 void AlphaAsmPrinter::printOperand(const MachineInstr *MI, int opNum)
 {
   const MachineOperand &MO = MI->getOperand(opNum);
-  if (MO.getType() == MachineOperand::MO_VirtualRegister) {
+  if (MO.getType() == MachineOperand::MO_Register) {
     assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??");
     O << TM.getRegisterInfo()->get(MO.getReg()).Name;
   } else if (MO.isImmediate()) {
@@ -93,7 +93,7 @@
   int new_symbol;
 
   switch (MO.getType()) {
-  case MachineOperand::MO_VirtualRegister:
+  case MachineOperand::MO_Register:
     O << RI.get(MO.getReg()).Name;
     return;