[AArch64] Enable merging of adjacent zero stores for all subtargets.
This optimization merges adjacent zero stores into a wider store.
e.g.,
strh wzr, [x0]
strh wzr, [x0, #2]
; becomes
str wzr, [x0]
e.g.,
str wzr, [x0]
str wzr, [x0, #4]
; becomes
str xzr, [x0]
Previously, this was only enabled for Kryo and Cortex-A57.
Differential Revision: https://reviews.llvm.org/D26396
llvm-svn: 286592
diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td
index 5e65827..b7f473f 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -61,11 +61,6 @@
"Reserve X18, making it unavailable "
"as a GPR">;
-def FeatureMergeNarrowZeroSt : SubtargetFeature<"merge-narrow-zero-st",
- "MergeNarrowZeroStores", "true",
- "Merge narrow zero store "
- "instructions">;
-
def FeatureUseAA : SubtargetFeature<"use-aa", "UseAA", "true",
"Use alias analysis during codegen">;
@@ -182,7 +177,6 @@
FeatureCrypto,
FeatureCustomCheapAsMoveHandling,
FeatureFPARMv8,
- FeatureMergeNarrowZeroSt,
FeatureNEON,
FeaturePerfMon,
FeaturePostRAScheduler,
@@ -253,7 +247,6 @@
FeatureCrypto,
FeatureCustomCheapAsMoveHandling,
FeatureFPARMv8,
- FeatureMergeNarrowZeroSt,
FeatureNEON,
FeaturePerfMon,
FeaturePostRAScheduler,
diff --git a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
index 3fe589f..fc5ed6e 100644
--- a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
@@ -1699,8 +1699,7 @@
UsedRegs.resize(TRI->getNumRegs());
bool Modified = false;
- bool enableNarrowZeroStOpt =
- Subtarget->mergeNarrowStores() && !Subtarget->requiresStrictAlign();
+ bool enableNarrowZeroStOpt = !Subtarget->requiresStrictAlign();
for (auto &MBB : Fn)
Modified |= optimizeBlock(MBB, enableNarrowZeroStOpt);
diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.h b/llvm/lib/Target/AArch64/AArch64Subtarget.h
index 359e689..e053d0d 100644
--- a/llvm/lib/Target/AArch64/AArch64Subtarget.h
+++ b/llvm/lib/Target/AArch64/AArch64Subtarget.h
@@ -71,7 +71,6 @@
// StrictAlign - Disallow unaligned memory accesses.
bool StrictAlign = false;
- bool MergeNarrowZeroStores = false;
bool UseAA = false;
bool PredictableSelectIsExpensive = false;
bool BalanceFPOps = false;
@@ -179,7 +178,6 @@
bool hasCrypto() const { return HasCrypto; }
bool hasCRC() const { return HasCRC; }
bool hasRAS() const { return HasRAS; }
- bool mergeNarrowStores() const { return MergeNarrowZeroStores; }
bool balanceFPOps() const { return BalanceFPOps; }
bool predictableSelectIsExpensive() const {
return PredictableSelectIsExpensive;