commit 10d6341618d792accb16a959a8481cbed4c7daec
author Chris Lattner <sabre@nondot.org> Thu May 04 17:52:23 2006 +0000
committer Chris Lattner <sabre@nondot.org> Thu May 04 17:52:23 2006 +0000
tree f46455c3468146bd3a6f81f1585e38d70a8ae610
parent fb2969205596dd8f0c5995e446f01a7b918fa4cf

Move some methods out of MachineInstr into MachineOperand

llvm-svn: 28102

llvm/lib/CodeGen/RegAllocLocal.cpp

diff --git a/llvm/lib/CodeGen/RegAllocLocal.cpp b/llvm/lib/CodeGen/RegAllocLocal.cpp
index f84f7e8..e3921e4 100644
--- a/llvm/lib/CodeGen/RegAllocLocal.cpp
+++ b/llvm/lib/CodeGen/RegAllocLocal.cpp
@@ -443,7 +443,7 @@
   // and return.
   if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
     MarkPhysRegRecentlyUsed(PR);          // Already have this value available!
-    MI->SetMachineOperandReg(OpNum, PR);  // Assign the input register
+    MI->getOperand(OpNum).setReg(PR);  // Assign the input register
     return MI;
   }
 
@@ -481,7 +481,7 @@
   ++NumLoads;    // Update statistics
 
   PhysRegsEverUsed[PhysReg] = true;
-  MI->SetMachineOperandReg(OpNum, PhysReg);  // Assign the input register
+  MI->getOperand(OpNum).setReg(PhysReg);  // Assign the input register
   return MI;
 }
 
@@ -599,7 +599,7 @@
           DestPhysReg = getReg(MBB, MI, DestVirtReg);
         PhysRegsEverUsed[DestPhysReg] = true;
         markVirtRegModified(DestVirtReg);
-        MI->SetMachineOperandReg(i, DestPhysReg);  // Assign the output register
+        MI->getOperand(i).setReg(DestPhysReg);  // Assign the output register
       }
     }