MIR Serialization: Serialize the machine function's liveins.
Reviewers: Duncan P. N. Exon Smith
llvm-svn: 243288
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index 656f231..bb25ec3 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -98,6 +98,7 @@
bool parse(MachineInstr *&MI);
bool parseMBB(MachineBasicBlock *&MBB);
bool parseNamedRegister(unsigned &Reg);
+ bool parseStandaloneVirtualRegister(unsigned &Reg);
bool parseRegister(unsigned &Reg);
bool parseRegisterFlag(unsigned &Flags);
@@ -289,6 +290,18 @@
return false;
}
+bool MIParser::parseStandaloneVirtualRegister(unsigned &Reg) {
+ lex();
+ if (Token.isNot(MIToken::VirtualRegister))
+ return error("expected a virtual register");
+ if (parseRegister(Reg))
+ return 0;
+ lex();
+ if (Token.isNot(MIToken::Eof))
+ return error("expected end of string after the register reference");
+ return false;
+}
+
static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
assert(MO.isImplicit());
return MO.isDef() ? "implicit-def" : "implicit";
@@ -843,3 +856,12 @@
SMDiagnostic &Error) {
return MIParser(SM, MF, Error, Src, PFS, IRSlots).parseNamedRegister(Reg);
}
+
+bool llvm::parseVirtualRegisterReference(unsigned &Reg, SourceMgr &SM,
+ MachineFunction &MF, StringRef Src,
+ const PerFunctionMIParsingState &PFS,
+ const SlotMapping &IRSlots,
+ SMDiagnostic &Error) {
+ return MIParser(SM, MF, Error, Src, PFS, IRSlots)
+ .parseStandaloneVirtualRegister(Reg);
+}