ARM refactor more NEON VLD/VST instructions to use composite physregs
Register pair VLD1/VLD2 all-lanes instructions. Kill off more of the
pseudos as a result.
llvm-svn: 152150
diff --git a/llvm/utils/TableGen/EDEmitter.cpp b/llvm/utils/TableGen/EDEmitter.cpp
index 70d07bc..b2912d0 100644
--- a/llvm/utils/TableGen/EDEmitter.cpp
+++ b/llvm/utils/TableGen/EDEmitter.cpp
@@ -579,7 +579,7 @@
REG("VecListThreeD");
REG("VecListFourD");
REG("VecListOneDAllLanes");
- REG("VecListTwoDAllLanes");
+ REG("VecListDPairAllLanes");
REG("VecListTwoQAllLanes");
IMM("i32imm");