commit 14a4af0e66553aa4b3fecb95d7d36e8f01ca7b8d
author Elena Demikhovsky <elena.demikhovsky@intel.com> Wed Dec 19 07:50:20 2012 +0000
committer Elena Demikhovsky <elena.demikhovsky@intel.com> Wed Dec 19 07:50:20 2012 +0000
tree bfbfdf478bb94e708908a5983e8934adc3109be2
parent 33360d8ae92e5b2a48bc83f0d0358093a61101df

Optimized load + SIGN_EXTEND patterns in the X86 backend.

llvm-svn: 170506

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 7c54d17..527fdaa 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -5235,6 +5235,7 @@
                                      LN0->getAlignment());
     CombineTo(N, ExtLoad);
     CombineTo(N0.getNode(), ExtLoad, ExtLoad.getValue(1));
+    AddToWorkList(ExtLoad.getNode());
     return SDValue(N, 0);   // Return N so it doesn't get rechecked!
   }
   // fold (sext_inreg (zextload x)) -> (sextload x) iff load has one use