| commit | 14e31a2fe77498ea5d0ccc44d9618aa22c9db812 | [log] [tgz] |
|---|---|---|
| author | Akira Hatanaka <ahatanaka@mips.com> | Tue Aug 20 22:58:56 2013 +0000 |
| committer | Akira Hatanaka <ahatanaka@mips.com> | Tue Aug 20 22:58:56 2013 +0000 |
| tree | bee8643da49729b9fa9f21030ce4d83d8ec8024a | |
| parent | 906e48f2a0a5bef36145243f6ce4269f1e35a89b [diff] |
[mips] Define register class FGRH32 for the high half of the 64-bit floating point registers. We will need this register class later when we add definitions for instructions mfhc1 and mthc1. Also, remove sub-register indices sub_fpeven and sub_fpodd and use sub_lo and sub_hi instead. llvm-svn: 188842