ArchV7M implies HW division instructions.
llvm-svn: 110797
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index bf95e99..5da83a6 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -78,7 +78,7 @@
[FeatureThumb2, FeatureNEON, FeatureDB]>;
def ArchV7M : SubtargetFeature<"v7m", "ARMArchVersion", "V7M",
"ARM v7M",
- [FeatureThumb2, FeatureDB]>;
+ [FeatureThumb2, FeatureDB, FeatureHWDiv]>;
//===----------------------------------------------------------------------===//
// ARM Processors supported.
@@ -151,8 +151,8 @@
[ArchV7A, FeatureT2XtPk]>;
// V7M Processors.
-def : ProcNoItin<"cortex-m3", [ArchV7M, FeatureHWDiv]>;
-def : ProcNoItin<"cortex-m4", [ArchV7M, FeatureHWDiv]>;
+def : ProcNoItin<"cortex-m3", [ArchV7M]>;
+def : ProcNoItin<"cortex-m4", [ArchV7M]>;
//===----------------------------------------------------------------------===//
// Register File Description