Implement unconditional branching support
llvm-svn: 4498
diff --git a/llvm/lib/Target/X86/InstSelectSimple.cpp b/llvm/lib/Target/X86/InstSelectSimple.cpp
index 144dc22..253f3dd 100644
--- a/llvm/lib/Target/X86/InstSelectSimple.cpp
+++ b/llvm/lib/Target/X86/InstSelectSimple.cpp
@@ -55,6 +55,7 @@
// fixed X86 code for each instruction.
//
void visitReturnInst(ReturnInst &RI);
+ void visitBranchInst(BranchInst &BI);
void visitAdd(BinaryOperator &B);
void visitShiftInst(ShiftInst &I);
@@ -162,6 +163,14 @@
BuildMI(BB, X86::RET, 0);
}
+void ISel::visitBranchInst(BranchInst &BI) {
+ if (BI.isConditional()) // Only handles unconditional branches so far...
+ visitInstruction(BI);
+
+ BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(0));
+}
+
+
/// Shift instructions: 'shl', 'sar', 'shr' - Some special cases here
/// for constant immediate shift values, and for constant immediate
/// shift values equal to 1. Even the general case is sort of special,