| commit | 17020f96c79a0b28275681e16569c81dc369d77b | [log] [tgz] |
|---|---|---|
| author | Chad Rosier <mcrosier@codeaurora.org> | Wed Jul 23 14:57:52 2014 +0000 |
| committer | Chad Rosier <mcrosier@codeaurora.org> | Wed Jul 23 14:57:52 2014 +0000 |
| tree | 1f6dadbf7ab978ce7e3a87bac0ded8699d0833c9 | |
| parent | 74acbb77678f702c84ad56f444abe259058f6bdc [diff] |
[AArch64] Lower sdiv x, pow2 using add + select + shift. The target-independent DAGcombiner will generate: asr w1, X, #31 w1 = splat sign bit. add X, X, w1, lsr #28 X = X + 0 or pow2-1 asr w0, X, asr #4 w0 = X/pow2 However, the add + shifts is expensive, so generate: add w0, X, 15 w0 = X + pow2-1 cmp X, wzr X - 0 csel X, w0, X, lt X = (X < 0) ? X + pow2-1 : X; asr w0, X, asr 4 w0 = X/pow2 llvm-svn: 213758