commit 18f805a7ea5f369ef523821693f1176b40bcfc7e
author Guillaume Chatelet <gchatelet@google.com> Fri Sep 27 12:54:21 2019 +0000
committer Guillaume Chatelet <gchatelet@google.com> Fri Sep 27 12:54:21 2019 +0000
tree 4304e048240695e0f4522b01e36ff6a884d83c5a
parent 7e317cab732181540fcd03000b3d3e2a5c8bc642

[Alignment][NFC] Remove unneeded llvm:: scoping on Align types

llvm-svn: 373081

llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp

diff --git a/llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp b/llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp
index 4bf32be..2b34b1d 100644
--- a/llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp
@@ -47,7 +47,7 @@
   BasicBlockInfo &BBI = BBInfo[MBB->getNumber()];
   BBI.Size = 0;
   BBI.Unalign = 0;
-  BBI.PostAlign = llvm::Align::None();
+  BBI.PostAlign = Align::None();
 
   for (MachineInstr &I : *MBB) {
     BBI.Size += TII->getInstSizeInBytes(I);
@@ -62,8 +62,8 @@
 
   // tBR_JTr contains a .align 2 directive.
   if (!MBB->empty() && MBB->back().getOpcode() == ARM::tBR_JTr) {
-    BBI.PostAlign = llvm::Align(4);
-    MBB->getParent()->ensureAlignment(llvm::Align(4));
+    BBI.PostAlign = Align(4);
+    MBB->getParent()->ensureAlignment(Align(4));
   }
 }
 
@@ -126,7 +126,7 @@
   for(unsigned i = BBNum + 1, e = MF.getNumBlockIDs(); i < e; ++i) {
     // Get the offset and known bits at the end of the layout predecessor.
     // Include the alignment of the current block.
-    const llvm::Align Align = MF.getBlockNumbered(i)->getAlignment();
+    const Align Align = MF.getBlockNumbered(i)->getAlignment();
     const unsigned Offset = BBInfo[i - 1].postOffset(Align);
     const unsigned KnownBits = BBInfo[i - 1].postKnownBits(Align);