commit 194693e996f98a52a37e957e3ef59e7b4078fa89
author Simon Pilgrim <llvm-dev@redking.me.uk> Mon Oct 30 17:24:40 2017 +0000
committer Simon Pilgrim <llvm-dev@redking.me.uk> Mon Oct 30 17:24:40 2017 +0000
tree 97a76b2c6941519f545ef92291a18fb536df5ab4
parent ad62cbe5d9dda4649c7e6edf47a53f2a0857d025

[MC] Split out register def/use idx calls to make debugging simpler. NFCI.

llvm-svn: 316927

llvm/lib/CodeGen/MachineCombiner.cpp

diff --git a/llvm/lib/CodeGen/MachineCombiner.cpp b/llvm/lib/CodeGen/MachineCombiner.cpp
index 3ffef68..9fc990f 100644
--- a/llvm/lib/CodeGen/MachineCombiner.cpp
+++ b/llvm/lib/CodeGen/MachineCombiner.cpp
@@ -161,9 +161,10 @@
         assert(DefInstr &&
                "There must be a definition for a new virtual register");
         DepthOp = InstrDepth[II->second];
-        LatencyOp = TSchedModel.computeOperandLatency(
-            DefInstr, DefInstr->findRegisterDefOperandIdx(MO.getReg()),
-            InstrPtr, InstrPtr->findRegisterUseOperandIdx(MO.getReg()));
+        int DefIdx = DefInstr->findRegisterDefOperandIdx(MO.getReg());
+        int UseIdx = InstrPtr->findRegisterUseOperandIdx(MO.getReg());
+        LatencyOp = TSchedModel.computeOperandLatency(DefInstr, DefIdx,
+                                                      InstrPtr, UseIdx);
       } else {
         MachineInstr *DefInstr = getOperandDef(MO);
         if (DefInstr) {