commit 194cb74decd32f8061f358345055b6ae2d5e72e6
author Craig Topper <craig.topper@intel.com> Tue Oct 24 15:50:55 2017 +0000
committer Craig Topper <craig.topper@intel.com> Tue Oct 24 15:50:55 2017 +0000
tree f86ad56017900ed4b3ca73be74bc701ccf70f1c8
parent df1285b8f49d686b50773ac0671331fe2a1c35d2

[TableGen] Fix some formatting quirks in the subtarget output file.

llvm-svn: 316450

llvm/utils/TableGen/SubtargetEmitter.cpp

diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp
index 4b6988c..c5ab391 100644
--- a/llvm/utils/TableGen/SubtargetEmitter.cpp
+++ b/llvm/utils/TableGen/SubtargetEmitter.cpp
@@ -1157,9 +1157,10 @@
       OS << "  nullptr, nullptr, 0, 0,"
          << " // No instruction-level machine model.\n";
     if (PM.hasItineraries())
-      OS << "  " << PM.ItinsDef->getName() << "};\n";
+      OS << "  " << PM.ItinsDef->getName() << "\n";
     else
-      OS << "  nullptr}; // No Itinerary\n";
+      OS << "  nullptr // No Itinerary\n";
+    OS << "};\n";
   }
 }
 
@@ -1225,7 +1226,7 @@
   // Emit the processor lookup data
   EmitProcessorLookup(OS);
 
-  OS << "#undef DBGFIELD";
+  OS << "\n#undef DBGFIELD";
 }
 
 void SubtargetEmitter::EmitSchedModelHelpers(const std::string &ClassName,
@@ -1389,7 +1390,7 @@
 #endif
 
   // MCInstrInfo initialization routine.
-  OS << "static inline MCSubtargetInfo *create" << Target
+  OS << "\nstatic inline MCSubtargetInfo *create" << Target
      << "MCSubtargetInfoImpl("
      << "const Triple &TT, StringRef CPU, StringRef FS) {\n";
   OS << "  return new MCSubtargetInfo(TT, CPU, FS, ";