[PowerPC] Generate VSX version of splat word
This patch corresponds to review:
http://reviews.llvm.org/D18592
It allows the PPC back end to generate the xxspltw instruction where we
previously only emitted vspltw.
llvm-svn: 268516
diff --git a/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp b/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
index 10636b8..a1aa841 100644
--- a/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
+++ b/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
@@ -407,9 +407,9 @@
case PPC::VSPLTB:
case PPC::VSPLTH:
case PPC::VSPLTW:
+ case PPC::XXSPLTW:
// Splats are lane-sensitive, but we can use special handling
- // to adjust the source lane for the splat. This is not yet
- // implemented. When it is, we need to uncomment the following:
+ // to adjust the source lane for the splat.
SwapVector[VecIdx].IsSwappable = 1;
SwapVector[VecIdx].SpecialHandling = SHValues::SH_SPLAT;
break;
@@ -515,7 +515,6 @@
// permute control vectors (for shift values 1, 2, 3). However,
// VPERM has a more restrictive register class.
case PPC::XXSLDWI:
- case PPC::XXSPLTW:
break;
}
}
@@ -806,12 +805,21 @@
llvm_unreachable("Unexpected splat opcode");
case PPC::VSPLTB: NElts = 16; break;
case PPC::VSPLTH: NElts = 8; break;
- case PPC::VSPLTW: NElts = 4; break;
+ case PPC::VSPLTW:
+ case PPC::XXSPLTW: NElts = 4; break;
}
- unsigned EltNo = MI->getOperand(1).getImm();
+ unsigned EltNo;
+ if (MI->getOpcode() == PPC::XXSPLTW)
+ EltNo = MI->getOperand(2).getImm();
+ else
+ EltNo = MI->getOperand(1).getImm();
+
EltNo = (EltNo + NElts / 2) % NElts;
- MI->getOperand(1).setImm(EltNo);
+ if (MI->getOpcode() == PPC::XXSPLTW)
+ MI->getOperand(2).setImm(EltNo);
+ else
+ MI->getOperand(1).setImm(EltNo);
DEBUG(dbgs() << " Into: ");
DEBUG(MI->dump());