commit 1aaf41af54fca47baa8caf3a4ec5b097d4c17976
author Krzysztof Parzyszek <kparzysz@codeaurora.org> Fri Feb 17 22:14:51 2017 +0000
committer Krzysztof Parzyszek <kparzysz@codeaurora.org> Fri Feb 17 22:14:51 2017 +0000
tree cf9568c0b367b03e4a4c91d6f035f06783a0dbcd
parent bca05df38b0122945b58c559c452c03b8e81c2ce

[Hexagon] Start using regmasks on calls

Reapply r295371 with a fix for the Windows bot failures.

llvm-svn: 295504

llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp

diff --git a/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp b/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp
index 9d8c294..7189b5a 100644
--- a/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp
@@ -111,9 +111,12 @@
     default:
       MI->print(errs());
       llvm_unreachable("unknown operand type");
+    case MachineOperand::MO_RegisterMask:
+      continue;
     case MachineOperand::MO_Register:
       // Ignore all implicit register operands.
-      if (MO.isImplicit()) continue;
+      if (MO.isImplicit())
+        continue;
       MCO = MCOperand::createReg(MO.getReg());
       break;
     case MachineOperand::MO_FPImmediate: {